Shift Register Unit Noise Release Circuit for Display Driving
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Solution Overview
Problem
Existing shift register circuits in TFT-LCDs suffer from noise and signal distortion due to noise coupling at the capacitor terminals and poor driving capability, especially when handling large loads.
Innovation Solution
The proposed shift register unit incorporates an input module, output control module, and output module, along with a reset control and reset module, utilizing transistors and capacitors to manage signal levels and clock signals, ensuring noise is released and distortion is avoided by transmitting signals effectively through low and high-level signal inputs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the capacitor C is charged during phase t1, then the node PU is at a high level, but noise couples to the other terminal of the capacitor resulting in noise in the output signal
Solution Approach 1:
The patent extracts the harmful noise coupling effect by introducing a dedicated noise release path through the second input sub-module. This sub-module provides a separate pathway to discharge the capacitor terminal that was previously coupled to noise, effectively separating the noise-free signal path from the noise-coupled path and eliminating the harmful interference in the output signal.
Solution Approach 2:
The second input sub-module acts as an intermediary element between the capacitor terminal and the output. It provides a controlled discharge path that mediates the noise coupling effect, allowing the capacitor to be discharged in a controlled manner that prevents noise from reaching the output terminal while maintaining proper signal levels.
2Power
If the clock signal input terminal CLK drives the output terminal with large load, then the driving capability is sufficient, but distortion occurs easily in the signal output terminal
Solution Approach 1:
The patent segments the signal transmission path into multiple controlled stages: the first input sub-module for signal input, the second input sub-module for noise release and level control, the output control module for clock signal modulation, and the output module for final signal output. This segmentation allows each stage to be optimized independently, ensuring proper driving capability while preventing distortion through controlled signal levels at each stage.
Solution Approach 2:
The patent changes the signal level parameters dynamically through the controlled discharge of the capacitor via the second input sub-module. By adjusting the voltage levels at different nodes (PU and PO) through controlled charging and discharging processes, the circuit maintains proper driving capability while preventing signal distortion that would occur with direct large-load driving.
Data Source
AI summary
The present invention discloses a shift register unit and driving method thereof, a gate driving circuit, and a display device, which relates to the field of display technology. The shift register unit comprises: an input module comprising a first input sub-module and a second input sub-module, an output control module and an output module. The first input sub-module transmits a signal inputted by a signal input terminal to a first node; the second input sub-module transmits a signal inputted by a low level signal input terminal to a second node based on the signal inputted by the signal input terminal; the output control module transmits a signal inputted by a clock signal input terminal to the second node based on the signal of the first node; the output module transmits a signal inputted by a high level signal input terminal to a signal output terminal based on the signal of the second node. The shift register unit and driving method thereof, the gate driving circuit, and the display device provided by the present invention are used for avoiding noise and distortion in signal output.