Shift Register Driving Circuit for High-Temperature OFF-State Stability

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Solution Overview

Problem

Liquid crystal display (LCD) devices with gate driving circuits formed on the panel using a thin film process experience malfunctioning due to leakage current in the main transistor at high temperatures, as the transistor fails to remain in the OFF state effectively.

Innovation Solution

A driving circuit with a shift register having multiple stages, including a first output circuit, a second output circuit, a controller circuit, and holding circuits that maintain low voltage states and control node potentials, utilizing transistors and capacitors to manage node voltages and prevent leakage current, even under extreme temperature conditions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If the gate driving circuit is formed on the LCD panel using a thin film process, then the device integration is improved and manufacturing complexity is reduced, but the main transistor fails to remain in the OFF state at high temperatures causing leakage current

Engineering Contradiction:
Improvedevice integrationVSAvoidtransistor OFF state stability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The shift register stage is divided into multiple functional circuits: a first output circuit for generating output signals, a second output circuit for generating carry signals, a controller circuit for controlling node potentials, and holding circuits for maintaining low voltage states. This segmentation allows each circuit to perform its specific function optimally, with the holding circuits specifically designed to maintain transistor OFF states even at high temperatures.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The holding circuits act as intermediary elements that maintain the low voltage state of the main transistor's gate, preventing leakage current from turning it on. The controller circuit serves as an intermediary that actively manages the potential at Node Q to ensure proper transistor operation across temperature variations.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the main transistor is kept in the OFF state to prevent leakage current, then reliability at high temperature is improved, but additional holding circuits and control mechanisms increase device complexity

Engineering Contradiction:
Improvetransistor OFF state stabilityVSAvoidcircuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The holding circuits are merged with the existing shift register stage structure, sharing common nodes and transistors where possible. The first holding circuit maintains the output signal while the second holding circuit maintains the carry signal, combining multiple functions into an integrated stage design rather than adding completely separate circuits.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The holding circuits serve multiple functions: they maintain the low voltage state to prevent leakage current, they hold the output and carry signals at appropriate levels, and they work in conjunction with the controller circuit to ensure stable operation across temperature ranges. This multi-functionality reduces the need for additional dedicated circuits.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS8860648B2Driving circuit with improved stability at high-temperature conditions
Publication Date: 2014.10.14 SAMSUNG DISPLAY CO LTD
  • US8860648B2 patent drawing
  • US8860648B2 patent drawing
  • US8860648B2 patent drawing

AI summary

A driving circuit including a shift register is presented, as well as a display device incorporating the driving circuit. The shift register has multiple stages, at least of which includes a first output circuit that generates an output signal O(i) according to a potential at Node Q; a second output circuit that generates a carry signal Cr(i) according to the potential at the Node Q; a controller circuit that controls the potential at the Node Q and the output signal O(i); a first holding circuit that maintains the output signal and the carry signal at low voltage states in response to a Node A reaching a predetermined potential; and a second holding circuit that controls a potential at the Node A, the second holding circuit including a first transistor that lowers the potential at the Node A in response to the carry signal Cr(i).