Shift Register Unit for Narrow-Frame OLED Displays
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Solution Overview
Problem
Current shift register units for gate drive circuits in OLED display panels are complex, requiring larger output drive transistors to manage different pulse widths and timings for scan and compensation signals, which hinders the design of high-resolution and narrow-frame displays.
Innovation Solution
A shift register unit comprising a first sub-shift register, a second sub-shift register, and an output control circuit, where the second sub-shift register outputs both display and random signals through a single output terminal, simplifying the circuit structure and allowing a single larger output drive transistor to handle both signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate output circuits are used for scan signals and compensation signals, then different pulse widths and timings can be managed, but the circuit structure becomes complex and requires larger output drive transistors
Solution Approach 1:
The patent merges the output circuits for scan signals and compensation signals into a single shared output circuit. The shift register unit includes a first output circuit for scan signals and a second output circuit for compensation signals, where both circuits share common components including the output drive transistor. This consolidation reduces circuit complexity while maintaining the ability to provide different pulse widths and timings through controlled switching.
Solution Approach 2:
The output drive transistor is designed to serve multiple functions by being shared between both the scan signal output and compensation signal output paths. The transistor operates in different modes depending on the phase: during the scan phase it drives the scan output, and during the compensation phase it drives the compensation output, thereby reducing the total transistor count and circuit complexity.
2Reliability
If separate output drive transistors are used for scan and compensation signals, then signal integrity is maintained, but the transistor size increases hindering high-resolution and narrow-frame display design
Solution Approach 1:
The patent consolidates the output drive transistors into a single shared device that serves both scan and compensation signal outputs. The output circuit includes a first output drive transistor and a second output drive transistor that share common connections and control mechanisms, reducing the total transistor area while maintaining signal integrity through phase-dependent switching.
Solution Approach 2:
The output drive transistor operates dynamically in different modes depending on the display phase. During the scan phase, the transistor is configured to drive scan signals with appropriate pulse width; during the compensation phase, the same transistor is reconfigured to drive compensation signals with different timing characteristics. This dynamic reconfiguration allows a single transistor to replace what would traditionally require multiple transistors.
Data Source
AI summary
A shift register unit, a gate drive circuit, a display device and a driving method are provided. The shift register unit includes a sub-shift register, a second sub-shift register and an output control circuit. The first sub-shift register includes a first output terminal and a first control node, and is configured to output a first clock signal under control of a level of the first control node. The second sub-shift register include a second output terminal and a second control node, and the second output terminal outputs a display output signal in a display phase and a random output signal in a blank phase under control of a level of the second control node. The output control circuit is connected to the first sub-shift register and the second control node, and is configured to control the level of the second control node under control of an output control signal.