Shift Register Noise Reduction via Opposite Phase Clock Signals
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Solution Overview
Problem
Existing shift register units in display technologies suffer from poor noise reduction performance due to ineffective control of the noise reduction sub-circuit by the clock signal, leading to inadequate pulling down of the output terminal to a low level.
Innovation Solution
A shift register unit comprising an input sub-circuit, a control sub-circuit, and a noise reduction sub-circuit, where the control sub-circuit manages the potential of the pull-down node and the noise reduction sub-circuit controls the output terminal potential using clock signals with opposite phases and the same frequencies, ensuring effective noise reduction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the noise reduction sub-circuit is controlled by the clock signal, then the circuit structure is simple, but the transistors cannot be turned on effectively when the clock signal is at low level, resulting in poor noise reduction performance
Solution Approach 1:
The clock signal control is segmented into two independent clock signals (first clock signal and second clock signal) that are opposite in phase. The noise reduction sub-circuit is divided into multiple transistor groups that can be independently controlled by these segmented clock signals, ensuring that at least one group is always in the on state for effective noise reduction.
Solution Approach 2:
The control mechanism is made dynamic by using opposite phase clock signals that continuously switch between high and low levels. This dynamic switching ensures that different transistor groups are activated at different times, maintaining continuous noise reduction capability throughout the operation cycle.
2Device complexity
If a single clock signal controls the noise reduction sub-circuit, then the control circuit is simple, but the output terminal cannot be pulled down effectively to low level during the entire cycle
Solution Approach 1:
Periodic action is applied通过使用两个相反相位的时钟信号，使得噪声降低子电路在不同的周期阶段能够有效地将输出终端拉到低电平，确保了整个工作周期内噪声降低的持续性。
Solution Approach 2:
通过相反相位的时钟信号持续控制多组晶体管，使得噪声降低子电路在整个工作周期内保持连续有效的噪声降低动作，避免了单时钟信号导致的动作中断。
Data Source
AI summary
A shift register unit includes a control sub-circuit and a noise reduction sub-circuit. The control sub-circuit can control a potential of a pull-down node as a first potential when a first clock signal is the first potential; the noise reduction sub-circuit can control a potential of an output terminal as a second potential when a pull-down node or a second clock signal is the first potential. Since frequencies of the first clock signal and the second clock signal are the same and phases thereof are opposite, the control sub-circuit and the noise reduction sub-circuit can control the potential of the output terminal as the second potential after the output phase of the shift register unit, so as to guarantee effective noise reduction of the output terminal.