Shift Register Output Buffer Segmentation for Power Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional shift registers, particularly those using single-type transistors, face high power consumption due to insufficient suppression of through-current, especially in large screen displays with depletion-mode transistors that cannot be fully turned OFF, leading to increased power consumption.
Innovation Solution
A shift register design featuring unit circuits with a first output unit and a second output unit, each including transistors with different current supply capabilities, and a logic circuit that generates signals to switch these transistors between conducting and non-conducting states, with the second voltage set higher than the fourth voltage to ensure the transistors are fully OFF, reducing through-current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a shift register is manufactured using a single type of transistor (e.g., n-type transistors) to save manufacturing cost, then manufacturing cost is reduced, but through-current increases leading to higher power consumption
Solution Approach 1:
The output stage is divided into two separate buffer amplifiers (first buffer amplifier and second buffer amplifier) that operate in a complementary manner. One buffer amplifier outputs to the scan line while the other outputs to the next unit circuit, ensuring that through-current paths are minimized by having transistors in different states.
Solution Approach 2:
Different voltage levels are applied to the transistors in the two buffer amplifiers. The first buffer amplifier uses a first voltage level while the second buffer amplifier uses a second voltage level, allowing optimization of current suppression while maintaining driving capability.
2Power
If buffer amplifiers are designed with large current supply capability to drive scan lines effectively, then driving capability is improved, but through-current suppression becomes more difficult leading to increased power consumption
Solution Approach 1:
The buffer amplifier is segmented into two parallel paths: one path (first buffer amplifier) dedicated to driving the scan line with high current capability, and another path (second buffer amplifier) dedicated to signal transmission to the next unit circuit. This segmentation allows each path to be optimized for its specific function while minimizing through-current.
Solution Approach 2:
The transistors in the two buffer amplifiers dynamically switch between conducting and non-conducting states in a complementary fashion. When the first buffer amplifier is active, the second is in high-impedance state, and vice versa, creating a dynamic system that suppresses through-current while maintaining driving capability.
Data Source
AI summary
A shift register includes unit circuits connected in a cascade, and each of the unit circuits includes a logic circuit, a first output unit, and a second output unit. The first output unit is a buffer amplifier for outputting a driving signal and includes: a first transistor for outputting a first voltage; and a second transistor for outputting a second voltage lower than the first voltage. The second output unit is a buffer amplifier for outputting a signal to a next unit circuit in the cascade and includes: a third transistor for outputting a third voltage; and a fourth transistor for outputting a fourth voltage lower than the third voltage. The second voltage is set at a potential higher than the fourth voltage.