Capacitive Shift Register Circuit for Extended Output Periods
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Solution Overview
Problem
Conventional shift registers require additional clock signal lines to extend the scanning line selection period, leading to increased frame area requirements, as they rely on clock signals for outputting turn-on voltage, limiting the selection period to the clock signal's on-period.
Innovation Solution
A shift register design featuring unit circuits with transistors and capacitors that generate and boost signals independently, allowing for an output period longer than the horizontal period without adding clock signal lines, using a first signal generating unit with a capacitor to boost the input signal and a second signal generating unit to sample and hold the signal, ensuring the output period is adjusted without increasing the frame area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of moving object
If additional clock signal lines are added to extend the scanning line selection period, then the output period is extended, but the frame area increases
Solution Approach 1:
The patent extracts the signal extension function from the clock signal lines and implements it within the unit circuits using capacitors. Each unit circuit generates extended signals independently by holding voltages on capacitors, removing the need for additional clock signal lines and thus preventing frame area increase while achieving extended output period
Solution Approach 2:
The patent introduces capacitors as intermediary elements within each unit circuit to store and release voltage signals. These capacitors act as mediators that extend the signal duration without requiring additional clock signal lines, resolving the contradiction between extended output period and frame area constraints
2Duration of action of moving object
If the selection period is extended beyond the clock signal on-period, then the output period is extended, but additional clock signals are required
Solution Approach 1:
The patent implements self-service by enabling each unit circuit to generate its own extended signals using local capacitors. The unit circuits autonomously extend their output periods by holding voltages on capacitors during the clock signal off-period, eliminating the need for additional clock signals while achieving extended selection period
Solution Approach 2:
The patent applies preliminary action by charging capacitors during the clock signal on-period before the off-period begins. This pre-charging allows the capacitors to maintain voltage levels and extend signals throughout the off-period, achieving extended selection period without requiring additional clock signals
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution allows for an extended output period without adding clock signal lines, preventing the increase in frame area and improving signal transfer efficiency by maintaining signal voltage levels through capacitive sampling and holding, thus enhancing the reliability and fabrication yield of the shift register.
Implementation Method 1
a first capacitor; a third transistor having a gate electrode connected to a clock signal line to which a clock signal is provided, and which switches conduction and non-conduction between the gate electrode of the first transistor and one of electrodes of the first capacitor
Data Source
AI summary
A shift register includes unit circuits connected in multiple stages, each of the unit circuits includes: a final buffer unit having an output transistor; and a signal A generating unit which supplies a first signal to a gate of the output transistor, the signal A generating unit includes: a capacitor; a transistor which switches conduction and non-conduction between the gate the output transistor and one of electrodes of the capacitor by a voltage from a clock signal line; a transistor which switches conduction and non-conduction between the other of the electrodes of the capacitor and the clock signal line by a voltage from an input line; and a transistor having a gate connected to a fixed power supply line, and which switches conduction and non-conduction between the one electrode of the first capacitor and the input line.