Shift Register Signal Overlap Prevention in LCD Driving
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Solution Overview
Problem
Shift registers in LCD driving circuits experience signal overlap, leading to unstable operation and impaired display quality due to adjacent shift register units outputting low-level signals simultaneously.
Innovation Solution
A shift register design comprising multiple units connected in series, each with a first, second, and third inversion circuit, where the third circuit receives a clock signal and outputs a control signal to maintain a stable low-level output, preventing signal overlap by using identical amplitude, duty ratio, and frequency clock signals that are inversed in phase.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If adjacent shift register units output low-level signals simultaneously, then the shift register can operate continuously, but signal overlap occurs leading to unstable operation and impaired display quality
Solution Approach 1:
The patent applies preliminary action by using the third inversion circuit to generate a control signal that turns off the second transistor before the first transistor can output a low-level signal. This preemptive action prevents the signal overlap problem by ensuring the current shift register unit is fully prepared to output a high-level signal before the previous unit finishes its low-level output, thereby eliminating the harmful effect of simultaneous output while maintaining continuous operation capability
Solution Approach 2:
The patent implements feedback through the third inversion circuit that receives the clock signal and generates a control signal based on it. This feedback mechanism dynamically adjusts the state of the second transistor to prevent signal overlap. The control signal from the third inversion circuit continuously monitors and responds to the clock signal changes, ensuring proper timing control and preventing the harmful simultaneous output condition
2Adaptability or versatility
If shift register units are connected in series to provide sequential signals, then scanning coverage is improved, but signal overlap between adjacent units occurs
Solution Approach 1:
The patent applies segmentation by dividing the shift register into multiple independent units connected in series, each with its own first, second, and third inversion circuits. This segmentation allows each unit to operate independently with proper timing control. The third inversion circuit in each unit acts as an independent control module that prevents signal overlap within its segment while maintaining the overall sequential scanning coverage across all units
Solution Approach 2:
The patent uses the third inversion circuit as an intermediary between the clock signal and the second transistor. This intermediary component generates a control signal that mediates the timing relationship between adjacent shift register units. The control signal from the third inversion circuit acts as a buffer and timer, ensuring that the second transistor turns off before the first transistor outputs a low-level signal, thereby eliminating signal overlap while preserving the series connection benefits for extended scanning coverage
Data Source
AI summary
An exemplary shift register (20) includes a plurality of shift register units (200). The shift register units receive a clock signal and an inverse clock signal and output a plurality of shift register signals in sequence. The outputs waveforms of pre-stage shift register unit and the rear-stage shift register unit have no overlapping signals.