Shift Register Circuit With Periodic Clock Control

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Solution Overview

Problem

Liquid crystal display shift register circuits face issues with current leakage, voltage stress, and high power consumption due to capacitive coupling effects and prolonged transistor activation, leading to image quality degradation and reduced reliability.

Innovation Solution

The shift register circuit employs an Nth shift register stage with a pull-up unit, input unit, energy-store unit, discharging unit, and pull-down unit, utilizing staggered pulse edges of multiple clocks to alternately control the driving control voltage and gate signals, reducing power consumption and mitigating voltage stress on transistors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the pull-down control voltage is retained at high power voltage to continuously pull down the driving control voltage and gate signal, then the transistors remain continuously turned on for reliable voltage control, but the transistors suffer high voltage stress leading to threshold voltage shift and reduced reliability

Engineering Contradiction:
Improvevoltage control reliabilityVSAvoidvoltage stress on transistors
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent implements periodic switching of the pull-down control voltage between high power voltage and low power voltage based on clock signals. The transistors are turned on during specific clock periods to pull down voltages when needed, and turned off during other periods to reduce voltage stress. This periodic action maintains voltage control reliability while preventing continuous high voltage stress that causes threshold voltage shift.

Inventive Principle:
Principle #19Periodic action

2Use of energy by moving object

If the pull-down control voltage is pulled down to low power voltage to reduce power consumption, then power consumption decreases, but two transistors in the control unit are simultaneously turned on causing high current leakage

Engineering Contradiction:
Improvepower consumptionVSAvoidcurrent leakage
Core Design Contradiction:
Use of energy by moving objectVSObject-generated harmful factors

Solution Approach 1:

The patent uses periodic clock signals to control the timing of voltage transitions. When the pull-down control voltage is switched to low power voltage, the clock signals are designed to prevent simultaneous turning on of both control unit transistors. The periodic action ensures that transistor switching occurs at different times, eliminating current leakage while maintaining low power consumption during non-active periods.

Inventive Principle:
Principle #19Periodic action

3Use of energy by moving object

If the driving control voltage is not pulled up to high-level voltage, then power consumption is reduced, but current leakage occurs in the pull-up unit due to capacitive coupling from clock ripple

Engineering Contradiction:
Improvepower consumptionVSAvoidcurrent leakage in pull-up unit
Core Design Contradiction:
Use of energy by moving objectVSObject-generated harmful factors

Solution Approach 1:

The patent employs periodic clock signals with specific timing relationships to control the pull-up operation. The clock signals are designed to activate the pull-up unit only during necessary periods, and keep it in a controlled state during other periods. This periodic control prevents continuous current leakage caused by capacitive coupling from clock ripple, while maintaining the ability to quickly pull up the driving control voltage when required.

Inventive Principle:
Principle #19Periodic action

4Reliability

If the transistors are continuously turned on to maintain voltage levels, then voltage control is reliable, but the working temperature increases and reduces circuit lifespan

Engineering Contradiction:
Improvevoltage control stabilityVSAvoidworking temperature
Core Design Contradiction:
ReliabilityVSTemperature

Solution Approach 1:

The patent implements periodic switching of transistor states based on clock signals. Transistors are turned on only during specific time periods when voltage control is actually needed, and turned off during other periods. This reduces continuous power dissipation and working temperature while maintaining voltage control stability during active periods. The energy-store units maintain voltage levels during transistor off-periods, ensuring continuous reliability without continuous transistor conduction.

Inventive Principle:
Principle #19Periodic action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design effectively reduces current leakage, lowers working temperature, and enhances the reliability and lifespan of the shift register circuit by preventing threshold voltage shifts and minimizing long-term voltage stress on transistors.

Implementation Method 1

an energy-store unit, electrically connected to the pull-up unit and the input unit, is employed to store the driving control voltage

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

the current leakage event of the pull-up unit may occur due to the ripple of the driving control voltage VQn which is caused by the rising and falling edges of the first clock CK1 via a capacitive coupling effect based on the device capacitor of the pull-up unit 120

Methodology Applied
Scientific EffectCapacitive coupling: Capacitance

Data Source

PatentUS8019039B1Shift register circuit
Publication Date: 2011.09.13 OPTRONIC SCIENCES LLC
  • US8019039B1 patent drawing
  • US8019039B1 patent drawing
  • US8019039B1 patent drawing

AI summary

A shift register includes plural shift register stages for providing plural gate signals to plural gate lines. Each shift register stage includes a pull-up unit, an input unit, an energy-store unit, a discharging unit and a pull-down unit. The pull-up unit pulls up a first gate signal according to a driving control voltage and a first clock. The input unit is utilized for inputting a second gate signal generated by a preceding shift register stage to become a driving control voltage which is stored in the energy-store unit. The discharging unit is utilized for performing an alternate pull-down operation on the driving control voltage according to a second clock and a third clock. The pull-down unit is utilized for performing an alternate pull-down operation on the first gate signal according to the second and third clocks.