Shift Register Unit Phase Inversion Control for P-N Transistor Signal Accuracy
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Solution Overview
Problem
Existing shift register units struggle to simultaneously output accurate operating signals for both P-type and N-type transistors in a pixel circuit due to delays and inefficiencies in signal transitions, leading to reduced operational efficiency and inaccurate charging effects.
Innovation Solution
The shift register unit incorporates a phase inversion control sub-circuit and additional control signals to manage the transition of output signals, ensuring that opposite-level signals are accurately provided to different types of transistors by controlling the change in signal levels through additional control lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a conventional shift register unit outputs signals for P-type and N-type transistors simultaneously, then both transistor types can be driven, but signal transition delays occur and operational efficiency decreases
Solution Approach 1:
The shift register unit is divided into separate first and second output sub-circuits, each dedicated to driving P-type and N-type transistors respectively. This segmentation allows independent optimization of signal paths for each transistor type, reducing cross-interference and transition delays while maintaining simultaneous driving capability.
Solution Approach 2:
The phase inversion control sub-circuit performs preliminary action by pre-controlling the timing and level transitions of output signals before they reach the transistors. By anticipating the required signal states and preparing them in advance, the circuit eliminates delays that would otherwise occur during transient transitions.
2Manufacturing precision
If the shift register unit uses additional control signals and phase inversion sub-circuit, then accurate opposite-level signals can be provided to different transistor types, but device complexity increases
Solution Approach 1:
The phase inversion control sub-circuit serves multiple functions: it controls signal level transitions, generates opposite-level outputs, and coordinates timing between P-type and N-type transistor drivers. By consolidating these functions into a single sub-circuit rather than separate components, the design achieves high signal accuracy without proportionally increasing overall circuit complexity.
Solution Approach 2:
The first and second output sub-circuits are merged into a unified shift register unit structure with shared control logic. This merging allows the circuit to provide accurate opposite-level signals through coordinated operation of integrated components, reducing the complexity that would arise from completely separate circuit implementations.
Data Source
Figure 1A~1C
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AI summary
Provided is shift register unit, a gate driving circuit, a display apparatus and a driving method thereof. The shift register unit includes an input-sub-circuit, having a first terminal connected to an input signal terminal and a second terminal connected to a terminal of a first control signal; a first output sub-circuit, having a first terminal connected to a third terminal of the input sub-circuit, a second terminal connected to a terminal of a second control signal, and a third terminal connected to a first output terminal; a phase inversion control sub-circuit, having a first terminal connected to the first output terminal, a second terminal connected to a terminal of a third control signal; and a second output sub-circuit, having a first terminal connected to the first output terminal, a second terminal connected to a third terminal of the phase inversion control sub-circuit, and a third terminal connected to a second output terminal; wherein the second output sub-circuit is configured that when a signal output by the first output sub-circuit changes from a valid level to an invalid level, a signal output by the second output sub-circuit changes from the invalid level to the valid level.