Shift Register Circuit Node Potential Control
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Solution Overview
Problem
The existing shift register circuits in display driving technology have a low driving capability, failing to maintain and control node potentials effectively, leading to abnormal outputting of gate drive signals and carry signals due to inability to manage low-level signals of different level values.
Innovation Solution
A shift register circuit design that includes specific control circuits for managing node potentials, such as pull-up and pull-down node control circuits, and output circuits for gate drive and carry signals, utilizing transistors and storage capacitors to ensure proper signal output and node control during various phases of operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the gate electrode signal output terminal directly provides input signal and reset signal to adjacent level shift register circuit, then the circuit structure is simple, but the driving capability is poor and node potentials cannot be properly controlled
Solution Approach 1:
The patent divides the output terminal functionality into separate dedicated circuits: input circuit, reset circuit, pull-up node control circuits, and pull-down node control circuits. Each circuit is responsible for specific node control tasks, transforming a single多功能 output terminal into multiple specialized control paths, thereby improving driving capability while maintaining reasonable structural complexity
Solution Approach 2:
The patent introduces intermediate control circuits (pull-up node control circuits and pull-down node control circuits) that act as mediators between the output terminal and the shift register circuit. These intermediary circuits properly control the potentials of pull-up and pull-down nodes, ensuring reliable signal transmission and resolving the driving capability issue
2Ease of operation
If the potentials of pull-up node and pull-down node are controlled to equal low level value, then the circuit operation is simplified, but the gate drive signal output transistor cannot be turned off properly
Solution Approach 1:
The patent applies different potential control strategies to different nodes based on their specific functions. The pull-up node and pull-down node are controlled to different low-level values (first low level and second low level respectively) according to their respective roles in the circuit, ensuring that the gate drive signal output transistor can be properly turned off while maintaining controlled simplicity
3Reliability
If dedicated control circuits for pull-up and pull-down nodes are added, then the driving capability and node potential control are improved, but the device complexity increases
Solution Approach 1:
The patent designs control circuits that perform multiple functions: the pull-up node control circuits and pull-down node control circuits not only control node potentials but also ensure proper signal transmission, maintain transistor switching states, and support different operational phases (input phase, output phase, reset phase). This multi-functionality justifies the added structural complexity by delivering comprehensive reliability improvements
Data Source
AI summary
A shift register circuit, a driving method, a gate driving circuit and a display device are provided. The shift register circuit includes an input circuit; a reset circuit; a first pull-up node control circuit; a second pull-up node control circuit for controlling the pull-up node to couple to the second level output terminal when a potential of the pull-down node is a first level; a first pull-down node control circuit for controlling the potential of the pull-down node being the first level in the reset phase; a second pull-down node control circuit for controlling the pull-down node to couple to the second level output terminal when the potential of the pull-up node is the first level; a gate drive signal output circuit; and a carry signal output circuit for controlling the carry signal output terminal to output a carry signal under control of the pull-up node and the pull-down node.