Shift Register Pull-Down Unit for LCD Gate Driving
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Solution Overview
Problem
Shift register units in LCD gate driving devices fail to maintain a low level signal reliably due to interference from input clock signals, leading to unintended high-level signal outputs.
Innovation Solution
Incorporating a pull-down unit and a driving unit within the shift register unit, where the pull-down unit ensures the gate driving signal is maintained at a low level and the driving unit generates an alternating current signal to operate the pull-down unit, preventing threshold voltage offset.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional shift register unit is used, then the structure is simple, but the output signal cannot be maintained at a low level reliably due to clock signal interference
Solution Approach 1:
The shift register unit is divided into multiple functional modules: a conventional shift register portion and a newly added pull-down unit with driving unit. This segmentation allows the new low-level maintenance function to be added without modifying the existing shift register logic, thereby improving reliability while keeping the overall structure manageable through modular design.
Solution Approach 2:
A pull-down unit is introduced as an intermediary component between the shift register output and the final output signal. This pull-down unit, controlled by the driving unit, acts as a mediator that forcibly maintains the output at low level when needed, counteracting the harmful effect of clock signal interference without requiring changes to the core shift register operation.
2Reliability
If a pull-down unit is added to maintain low level signal, then the signal stability is improved, but the device complexity increases
Solution Approach 1:
The driving unit dynamically controls the pull-down unit by changing the operational state of transistors based on timing signals. Instead of using a permanently active complex circuit, the system changes the parameters (on/off states) of existing transistors in response to clock and reset signals, achieving reliable low-level maintenance with minimal additional hardware complexity.
Solution Approach 2:
The pull-down unit is activated periodically through the driving unit in synchronization with the clock signal cycles. The transistor in the pull-down unit is turned on during specific phases of the clock cycle when low-level maintenance is needed and turned off otherwise, achieving the desired function through periodic control rather than continuous complex operation.
3Device complexity
If a direct current signal is used to drive the pull-down unit, then the circuit is simple, but the threshold voltage of the thin film transistor offsets largely
Solution Approach 1:
The driving unit generates an alternating current driving signal that periodically switches the pull-down transistor on and off in synchronization with the clock signal. This periodic AC driving prevents the thin film transistor from operating continuously at a fixed bias point, thereby preventing threshold voltage offset while maintaining the pull-down function during active phases.
Solution Approach 2:
Instead of using a static direct current driving signal, the system employs a dynamic alternating current signal whose timing and amplitude are adjusted based on the operational phase. This dynamic driving approach allows the pull-down transistor to operate in different regions during different clock phases, preventing threshold voltage drift while maintaining effective low-level signal maintenance.
Data Source
AI summary
The present invention provides a shift register unit, a gate driving device and a liquid crystal display, wherein the shift register unit includes a first thin film transistor, a second thin film transistor, a third thin film transistor and a fourth thin film transistor, and further includes a pull-down unit and a driving unit. Since the shift register unit includes the pull-down unit and the driving unit, it is possible to assure that the output gate driving signal keeps at a low level stably when the shift register unit needs to output a low level, and the pull-down unit operates under the driving of an alternating current signal, which can prevent the threshold voltage of the thin film transistor of the pull-down unit from offsetting largely.