Shift Register Pull-Down Circuit Reduces Current Leakage
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As display panel resolution increases, the time for the source driver to transmit pixel information shortens, leading to weakened driving power in shift register circuits due to current leakage, which can result in slow voltage transitions and incorrect pixel charging.
Innovation Solution
The shift register circuit incorporates a pull-down circuit and a pull-down voltage regulator, along with a receiving circuit and capacitor, to manage voltage levels and reduce source-drain voltage gaps, ensuring accurate and fast gate driving signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If display panel resolution increases, then pixel density improves, but transmission time for pixel information shortens leading to current leakage and weakened driving power
Solution Approach 1:
The shift register circuit is divided into multiple stages (first stage, second stage, etc.), with each stage independently controlling voltage levels at different nodes. This segmentation allows precise control of voltage transitions in each stage, preventing current leakage while maintaining driving power for high-resolution displays
Solution Approach 2:
The circuit performs preliminary voltage level preparation by using the first switch to pre-charge or pre-discharge nodes before main switching operations. This preliminary action ensures that voltage transitions occur smoothly and quickly, preventing current leakage that would otherwise occur during rapid switching in high-resolution displays
2Productivity
If transmission time shortens, then productivity improves, but voltage transitions become slow due to current leakage
Solution Approach 1:
The circuit dynamically changes voltage parameters (voltage levels, timing sequences) based on operational requirements. By adjusting voltage levels and switching sequences, the circuit achieves fast voltage transitions that match the shortened transmission times required for high-productivity operation
Solution Approach 2:
The circuit uses feedback mechanisms where later stages (second stage, third stage) monitor and respond to voltage levels at earlier nodes. This feedback ensures that voltage transitions occur at the correct timing, maintaining fast transition speeds even when overall transmission time is reduced
3Loss of energy
If current leakage increases, then energy loss worsens, but gate driving signal integrity deteriorates
Solution Approach 1:
The circuit introduces intermediary components (capacitors, resistors, intermediate switching stages) that mediate between voltage sources and load. These intermediaries prevent direct current leakage paths while maintaining signal integrity by controlling voltage transitions through intermediate states
Solution Approach 2:
The circuit extracts or removes harmful current leakage paths by using the pull-down circuit to actively discharge nodes that would otherwise leak current. This extraction of leakage current prevents energy loss while maintaining clean, intact gate driving signals
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces current leakage and maintains the integrity of gate driving signals, preventing wrong charging of display panel pixels and ensuring reliable operation.
Implementation Method 1
a capacitor, electrically coupled between the control terminal and the second terminal, for coupling the voltage level of the control terminal to a second high voltage level in response to the clock signal having the first high voltage level
Data Source
AI summary
A shift register includes a plurality of stages of shift register circuit. Each stage of shift register circuit includes a first switch, an input circuit, a pull-down circuit, and a pull-down voltage regulator circuit. The first switch is used to output a scan signal according to a voltage level of a node and a clock signal. The input circuit is used to pull up the voltage level of the node according to a signal from a previous M-th stage of shift register circuit. The pull-down circuit is used to pull down the voltage level of the node according to the clock signal and a signal from a following L-th shift register circuit and reduce current leakage at the node. The pull-down voltage regulator circuit is used to pull down the voltage levels of the node and the scan signal according to the voltage level of the node.