Shift Register Pull-Up Node Charging Reliability
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Solution Overview
Problem
Existing shift registers in display apparatuses face challenges in adequately charging the pull-up node due to signal delays and transistor threshold voltage drift, leading to insufficient charging and reduced reliability.
Innovation Solution
The proposed shift register design includes a first pull-down sub-circuit that rapidly pulls down the voltage of the first pull-down node, ensuring the pull-up node is adequately charged, and avoids the issues of signal delay and transistor threshold voltage drift.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional shift register design is used, then device complexity is reduced, but the pull-up node cannot be adequately charged due to signal delays and transistor threshold voltage drift
Solution Approach 1:
The first pull-down sub-circuit is activated in advance during the noise reduction phase to rapidly pull down the first pull-down node before the charging phase begins. This preliminary action ensures that the pull-up node can be adequately charged without suffering from signal delays or transistor threshold voltage drift that would occur if the pull-down action were delayed.
Solution Approach 2:
The pull-down function is segmented into a dedicated first pull-down sub-circuit that operates independently from other circuit components. This segmentation allows the pull-down operation to be precisely controlled and executed at the appropriate time, ensuring reliable charging of the pull-up node without interfering with other circuit functions.
2Manufacturing precision
If signal delay is not compensated, then device complexity is reduced, but charging precision deteriorates due to transistor threshold voltage drift
Solution Approach 1:
The first pull-down sub-circuit performs its function in advance during the noise reduction phase, before any signal delays or transistor threshold voltage drift can affect the charging process. This timing ensures that when the charging phase begins, the circuit is in the optimal state for precise charging.
Solution Approach 2:
The circuit uses the voltage state of the first pull-down node as feedback to control the timing and operation of the first pull-down sub-circuit. This feedback mechanism ensures that the pull-down action occurs at the precise moment needed, compensating for any variations in signal delay or transistor characteristics.
Data Source
Figure 1
Figure 2A
Figure 2B
AI summary
A shift register comprises a pull-up node, a first pull-down node, an input sub-circuit, a first noise reduction sub-circuit, and a first pull-down sub-circuit. The first noise reduction sub-circuit is coupled to the pull-up node, the first pull-down node, and a first voltage signal terminal, and is configured to transmit, under control of a voltage of the first pull-down node, a first voltage signal received at the first voltage signal terminal to the pull-up node. The input sub-circuit is coupled to the pull-up node and a signal input terminal, and is configured to transmit, in response to an input signal received at the signal input terminal, the input signal to the pull-up node. The first pull-down sub-circuit is coupled to the signal input terminal, the first pull-down node, and the first voltage signal terminal, and is configured to transmit, in response to the input signal received at the signal input terminal, the first voltage signal received at the first voltage signal terminal to the first pull-down node, such that the first noise reduction sub-circuit is turned off under control of the voltage of the first pull-down node and stops transmitting the first voltage signal to the pull-up node.