Shift Register Unit Power Reduction via Pull-Up Node Control
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Solution Overview
Problem
Large-sized display apparatuses face excessive power consumption due to inefficient shift register units in gate driving circuits, leading to high dynamic power consumption from repeated charging and discharging of capacitors in transistors.
Innovation Solution
A shift register unit design incorporating an input sub-circuit for charging a pull-up control node and an output sub-circuit with a first capacitor and transistors to transmit a constant voltage, reducing power consumption by minimizing capacitor charging and discharging through a bootstrapping effect.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If conventional shift register units are used in gate driving circuits for large-sized display apparatuses, then the gate driving function is achieved, but excessive power consumption occurs due to repeated charging and discharging of capacitors in transistors
Solution Approach 1:
The patent applies preliminary action by pre-charging the pull-up control node through the input sub-circuit before the output switching operation. This ensures that the node is already charged to the required voltage level, eliminating the need for repeated charging during normal operation and reducing dynamic power consumption significantly.
Solution Approach 2:
The patent implements periodic action through the clock signal that periodically controls the switching of the output transistor. The clock signal operates in periodic cycles, turning the transistor on and off in a controlled manner, which allows the circuit to maintain output signals without continuous power consumption and reduces overall energy usage.
2Area of stationary object
If transistor size is reduced to save space in large-sized display apparatuses, then area is saved, but power consumption control becomes more difficult due to increased sensitivity to noise and leakage
Solution Approach 1:
The patent introduces the pull-up control node as an intermediary element between the input signal and the output transistor gate. This intermediary node, controlled by the input sub-circuit, acts as a buffer that stabilizes the gate voltage of the output transistor, ensuring reliable switching operation even when the transistor size is reduced. This mediator prevents direct coupling of noise and leakage effects, maintaining signal stability in compact designs.
Data Source
AI summary
The embodiments of the present application disclose a shift register unit and a method for driving the same, a gate driving circuit and a method for driving the same, and a display apparatus. The shift register unit comprises an input sub-circuit connected to an input signal terminal and a pull-up control node, and configured to charge the pull-up control node under control of an input signal; and an output sub-circuit connected to the pull-up control node, a clock signal terminal, a first voltage terminal, and an output signal terminal, and configured to output a first constant voltage to the output signal terminal under control of a clock signal and the pull-up control node.


