Shift Register Pull-Up Node Voltage Stabilization
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Solution Overview
Problem
The existing Gate Driver On Array (GOA) technology in displays experiences unstable voltage at the pull-up node in shift register units due to high driving voltage, leading to electrical leakage and poor display performance.
Innovation Solution
A shift register unit is designed with specific input, output, and de-noising sub-circuits connected to a pull-up node, along with pull-down control circuits, to manage voltage levels and reduce electrical leakage by controlling signal transmission and clock signals, thereby stabilizing the pull-up node voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If high driving voltage is used in the shift register unit, then the pixel charging rate is ensured, but the voltage at the pull-up node becomes unstable, resulting in electrical leakage and poor display performance
Solution Approach 1:
The shift register unit is divided into multiple functional sub-circuits (input sub-circuit, output sub-circuit, de-noising sub-circuit, pull-down control sub-circuit) that independently manage different aspects of signal processing. This segmentation allows each sub-circuit to be optimized for its specific function, enabling the system to maintain stable pull-up node voltage while ensuring pixel charging rate through coordinated operation of these specialized sub-circuits.
Solution Approach 2:
The pull-up node serves as an intermediary element that mediates between the input sub-circuit and output sub-circuit. By introducing dedicated pull-down control sub-circuits that regulate the pull-up node voltage, the system can maintain stable intermediate voltage levels even when high driving voltages are applied, thus preventing electrical leakage while ensuring fast pixel charging.
2Productivity
If high driving voltage is used to ensure pixel charging rate, then charging speed improves, but electrical leakage occurs and display performance deteriorates
Solution Approach 1:
The pull-down control sub-circuits are designed to preemptively counteract electrical leakage by actively regulating the pull-up node voltage. Before leakage can occur, the control sub-circuits detect voltage deviations and apply corrective pull-down actions, thus preventing harmful leakage effects while allowing high driving voltages to be used for fast pixel charging.
Solution Approach 2:
The pull-down control sub-circuits implement feedback control by continuously monitoring the pull-up node voltage and adjusting their operation accordingly. When the pull-up node voltage deviates from the desired level, the feedback mechanism activates the pull-down control to restore stability, thereby preventing electrical leakage while maintaining high pixel charging speeds through the main drive circuitry.
3Reliability
If high driving voltage is applied, then pixel charging is ensured, but delays in gate scanning signals occur and crosstalk in pixel regions increases
Solution Approach 1:
The de-noising sub-circuits perform preliminary signal conditioning by removing noise and stabilizing signals before they propagate through the shift register unit. This preliminary action prevents signal degradation that would otherwise cause delays in gate scanning signals, allowing the system to maintain reliable pixel charging without time losses in signal transmission.
Solution Approach 2:
The circuit employs dynamic voltage regulation through the pull-down control sub-circuits that adaptively adjust their operation based on real-time signal conditions. This dynamic control ensures that gate scanning signals maintain their timing integrity even when high driving voltages are applied for reliable pixel charging, thereby preventing signal delays and crosstalk.
Data Source
AI summary
The present disclosure provides a shift register unit and a method for driving the same, a gate driving circuit, and a display apparatus. The shift register unit includes: a first input sub-circuit configured to transmit a signal at a first signal input terminal to a pull-up node under control of the first signal input terminal; a second input sub-circuit configured to transmit the signal at the first signal input terminal to the pull-up node under control of a second signal input terminal; a first output sub-circuit configured to transmit a signal at a first clock signal terminal to a first signal output terminal under control of the pull-up node; and a second output sub-circuit configured to transmit a signal at a second clock signal terminal to a second signal output terminal under control of the pull-up node.