Shift Register Pull-Down Control for GOA Display Panels

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The existing gate driving circuits in flat LCD displays, particularly those using Gate On Array technology, face issues with the pull-down speed of gate control signals affecting the driving effect on pixel arrays, leading to misoperation of switches and abnormal image display due to frequency signal coupling in shift registers.

Innovation Solution

A shift register circuit is designed with a pull-down control circuit and specific switch configurations to manage the operation status of switches, using a capacitor to maintain voltage levels and eliminate interference signals, ensuring proper operation and image display.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If the gate driving circuit is integrated directly on the array substrate using Gate On Array technology, then the production cost is reduced and the panel thickness is decreased, but the pull-down speed of the gate control signal deteriorates, causing misoperation of switches and abnormal image display

Engineering Contradiction:
Improveproduction costVSAvoidswitch operation accuracy
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The shift register circuit is divided into multiple stages, with each stage independently controlling a segment of the pixel array. This segmentation allows each stage to operate independently with optimized pull-down control, preventing signal interference between stages while maintaining the integrated GOA architecture benefits.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A pull-down control circuit is introduced as an intermediary component between the frequency signal input and the switch control nodes. This intermediary circuit actively manages the pull-down speed and timing, ensuring that switches are properly controlled without the harmful coupling effects that would otherwise occur in the integrated GOA structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Length of moving object

If the gate driving circuit is integrated directly on the array substrate using Gate On Array technology, then the panel thickness is decreased, but the pull-down speed of the gate control signal deteriorates, leading to misoperation of switches

Engineering Contradiction:
Improvepanel thicknessVSAvoidpull-down speed
Core Design Contradiction:
Length of moving objectVSSpeed

Solution Approach 1:

The pull-down control circuit dynamically adjusts the pull-down speed based on the operating conditions and frequency signal characteristics. By making the pull-down timing adaptive rather than fixed, the circuit maintains fast response needed for thin panel design while preventing misoperation caused by improper timing.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The circuit changes the timing parameters and voltage levels of the pull-down control signals to optimize performance. By adjusting these parameters, the integrated GOA circuit achieves sufficient pull-down speed for thin panel applications while maintaining reliable switch operation without external IC intervention.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If a frequency signal is coupled to the shift register, then the shift register can generate scan signals, but the periodic frequency signal causes multiple switches to misoperate during turning on and off, displaying abnormal images

Engineering Contradiction:
Improvescan signal generationVSAvoidsignal interference
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The pull-down control circuit converts the harmful effect of frequency signal coupling into a beneficial control mechanism. By using the frequency signal itself to drive the pull-down control, the circuit synchronizes the pull-down action with the signal transitions, turning what would be interference into a precise timing reference that prevents misoperation.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

The circuit implements feedback mechanisms where the output signals and node voltages are monitored and fed back to the pull-down control circuit. This feedback allows the control circuit to adjust its action in real-time, preventing the frequency signal from causing harmful coupling effects while maintaining productive scan signal generation.

Inventive Principle:
Principle #23Feedback

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively eliminates interference signals, ensuring accurate operation of shift registers and preventing abnormal image display, thereby improving the display quality and reducing production costs by integrating the driving circuit directly on the array substrate.

Implementation Method 1

a first capacitor electrically coupled to the frequency signal and the second node; wherein an operation status of the fourth switch is controlled and an interference signal of the shift register is eliminated through the pull-down control circuit

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS11004415B2Shift register circuit and display panel using the same
Publication Date: 2021.05.11 HKC CORP LTD
  • US11004415B2 patent drawing
  • US11004415B2 patent drawing
  • US11004415B2 patent drawing

AI summary

A shift register comprises: a first switch electrically coupled to a control signal, and to a first node; a second switch electrically coupled to the first node, to a frequency signal, and to a first output signal; a third switch electrically coupled to a second node, to the first output signal, and to a low predetermined voltage level; a fourth switch electrically coupled to a second output signal, to the first node, and to the low predetermined voltage level; a fifth switch electrically coupled to the first node, to the frequency signal, and to a third node; and a pull-down control circuit electrically coupled to the frequency signal, the low predetermined voltage level and the second node.