Shift Register Stage Segmentation for Scan Pulse Distortion
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Solution Overview
Problem
Existing shift registers in LCDs suffer from scan pulse distortion due to increased resistance and capacitance in longer gate lines, leading to shortened valid charge times and potential damage to switching elements, as each stage simultaneously applies scan pulses to both the gate line and the next stage.
Innovation Solution
The shift register design includes stages that independently generate two scan pulses, with one pulse applied to the gate line and the other to the next stage, reducing the load on individual scan pulses and minimizing distortion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If each stage simultaneously applies scan pulses to both the gate line and the next stage, then the scan pulse can be transmitted to multiple locations, but the scan pulse becomes distorted due to increased resistance and capacitance
Solution Approach 1:
The patent divides the scan pulse transmission function into two separate pulses: a first scan pulse transmitted to the gate line and a second scan pulse transmitted to the next stage. This segmentation reduces the load on each pulse, minimizing distortion caused by resistance and capacitance in the gate line while maintaining efficient sequential scanning operation.
2Area of stationary object
If the gate line is made longer to cover more pixel areas, then the display area increases, but the resistance and capacitance in the gate line increases causing scan pulse distortion
Solution Approach 1:
By segmenting the scan pulse transmission into two separate pulses (one to the gate line, one to the next stage), the patent reduces the effective load on the gate line transmission path. This allows the gate line to be longer to cover more display area while maintaining scan pulse signal quality, as each pulse experiences reduced distortion from the distributed resistance and capacitance.
3Productivity
If scan pulses are applied simultaneously to the gate line and next stage, then the shifting operation is efficient, but the valid charge time is shortened due to pulse distortion
Solution Approach 1:
The patent segments the scan pulse output into a first scan pulse for the gate line and a second scan pulse for the next stage. This segmentation maintains the efficiency of simultaneous scanning operation while reducing pulse distortion that would otherwise shorten the valid charge time. Each pulse has reduced load, preserving the charge time necessary for proper pixel electrode charging.
4Device complexity
If a single scan pulse is used for both gate line and next stage, then the circuit is simpler, but the scan pulse is distorted due to increased load
Solution Approach 1:
The patent implements segmentation by having each shift register stage generate two separate scan pulses: a first scan pulse transmitted to the gate line and a second scan pulse transmitted to the next stage. This increases circuit complexity slightly but significantly improves scan pulse waveform accuracy by reducing the load and distortion on each individual pulse, allowing for more precise timing and charging control.
Data Source
AI summary
A shift register and a method for driving the same are disclosed. The shift register includes a plurality of stages serially connected to each other. Each of the stages independently generates first and second scan pulses. The first scan pulse is simultaneously applied to a previous stage and to a corresponding gate line of a liquid crystal panel. The second scan pulse is applied to a next stage. The shift register prevents scan pulses applied to each stage from being distorted, and prevents a multi-output signal from being generated.