Shift Register Pulse-Width Synthesis for Dual-Phase Inputs

Solution Overview

Problem

Existing shift registers face challenges in efficiently handling input pulses with different phases, leading to increased area and power consumption due to the need for separate circuits for each phase.

Innovation Solution

A shift register design that includes a synthesized pulse generation circuit, a shifted synthesized pulse generation circuit, a pulse width detection circuit, and a shifted pulse output circuit, which synthesizes input pulses to share circuits and adjust pulse widths based on the phase of the input pulses, allowing for the distinction of pulse phases and reduction in area and power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If separate circuits are used for each phase to handle input pulses with different phases, then the reliability of phase handling is improved, but the area and power consumption increase

Engineering Contradiction:

Improvephase handling reliabilityVSAvoidshift register area

Core Design Contradiction:

ReliabilityVSArea of stationary object

Solution Approach 1:

The patent merges the handling of first phase pulses and second phase pulses into a single shared shift register circuit. By synthesizing input pulses and using pulse width modulation to encode phase information, the system eliminates the need for separate circuits for each phase, thereby reducing area while maintaining reliable phase distinction

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The patent changes the parameter used to distinguish phases from separate circuit paths to pulse width parameters. By synthesizing pulses with different widths based on the input phase and detecting these width differences, the system maintains phase reliability through parameter variation rather than structural duplication

Inventive Principle:

Principle #35Parameter changes

2Reliability

If separate circuits are used for each phase to handle input pulses with different phases, then the reliability of phase handling is improved, but the power consumption increases

Engineering Contradiction:

Improvephase handling reliabilityVSAvoidshift register power consumption

Core Design Contradiction:

ReliabilityVSUse of energy by stationary object

Solution Approach 1:

The patent merges the handling of first phase pulses and second phase pulses into a single shared shift register circuit. By synthesizing input pulses and using pulse width modulation to encode phase information, the system eliminates the need for separate circuits for each phase, thereby reducing area while maintaining reliable phase distinction

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The shift register circuit is designed to be universal and multi-functional, capable of handling both first phase pulses and second phase pulses through the same hardware path. The synthesized pulse generation and pulse width detection mechanisms enable the single circuit to perform what previously required multiple dedicated circuits, reducing overall power consumption

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Adaptability or versatility

If pulse width detection is implemented to distinguish phases, then the adaptability to different phase inputs is improved, but the device complexity increases

Engineering Contradiction:

Improvephase input adaptabilityVSAvoidshift register complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent changes the parameter used to distinguish phases from separate circuit paths to pulse width parameters. By synthesizing pulses with different widths based on the input phase and detecting these width differences, the system maintains phase reliability through parameter variation rather than structural duplication

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent introduces a synthesized pulse as an intermediary that mediates between the input phase pulses and the shift register. This synthesized pulse carries phase information in its width, allowing the shift register to handle different phases without direct complex phase detection logic, thereby managing complexity through intermediate signal transformation

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS11469747B1Shift register and electronic device including the same

Publication Date: 2022.10.11 SK HYNIX INC

AI summary

A shift register generates a synthesized pulse having a different pulse width according to which one of a first phase pulse and a second phase pulse is inputted, generates an internal shifted synthesized pulse and a shifted synthesized pulse from the synthesized pulse, and generates a detection signal by detecting a pulse width of the internal shifted synthesized pulse. The shift register outputs the shifted synthesized pulse as one of a first shifted phase pulse and a second shifted phase pulse based on the detection signal.