Shift Register Pulse Width Control for Narrow Bezel Displays

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Solution Overview

Problem

Existing gate driving circuits, particularly EMGOA circuits, have complex shift register structures that result in large layout areas, making it difficult to achieve high-definition displays with narrow bezels and increased pixels per inch.

Innovation Solution

A simplified shift register design with a pulse width control circuit that adjusts the duration of pixel emission by controlling the output of pull-up and pull-down circuits using control signals, allowing for a smaller layout area and adjustable pulse width.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Duration of action of moving object

If a traditional shift register structure is used in EMGOA circuits, then the pixel light emission duration can be controlled, but the layout area of the GOA circuit becomes large

Engineering Contradiction:
Improvepixel light emission durationVSAvoidGOA circuit layout area
Core Design Contradiction:
Duration of action of moving objectVSArea of stationary object

Solution Approach 1:

The shift register is divided into functional modules: input module, pulse width control module, pull-up module, and pull-down module. Each module performs a specific function, allowing the circuit to maintain full functionality while reducing overall complexity and layout area through modular organization.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The pulse width control module serves multiple functions: it controls the light emission duration of pixels, generates appropriate timing signals, and coordinates the operation of pull-up and pull-down modules. This multi-functionality reduces the need for separate dedicated circuits, thereby reducing layout area.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Manufacturing precision

If the number of pixels is increased to achieve high definition and high PPI displays, then display quality is improved, but the number of rows requiring scanning increases, demanding smaller GOA layout area and simpler circuit structure

Engineering Contradiction:
Improvedisplay definition and PPIVSAvoidGOA circuit structure complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The GOA circuit is segmented into standardized shift register units that can be cascaded. Each unit contains modular components (input module, pulse width control module, pull-up module, pull-down module) that can be replicated and connected in series, simplifying the design process for high-resolution displays with increased pixel counts.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The pulse width control module dynamically adjusts the light emission duration based on the specific pixel row being scanned. This dynamic control allows the same circuit structure to efficiently handle varying scanning requirements across different display resolutions, maintaining simplicity while supporting high PPI displays.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentEP3758002B1Shift register, gate driver on array circuit and display device
Publication Date: 2024.01.10 BOE TECHNOLOGY GROUP CO LTD
  • EP3758002B1 patent drawingFigure 1~2
  • EP3758002B1 patent drawingFigure 3
  • EP3758002B1 patent drawingFigure 4

AI summary

The present disclosure relates to a shift register, a gate driving circuit and a display device. The shift register includes an input circuit, a pull-up circuit, a pull-down circuit, a pulse width control circuit, and an output node. The input circuit includes a trigger signal receiving terminal for receiving a trigger signal, and is configured to control the pull-down circuit to output a low level signal to the output node based on the trigger signal under control of a first control signal at the first control terminal. The pulse width control circuit is configured to control the pull-up circuit to output a high level signal to the output node under control of the first control signal and a second control signal CK2 at a second control terminal, wherein a pulse width of the high level signal varies with a pulse width of the trigger signal, wherein when the pull-up circuit is controlled to output the high level signal, the pull-down circuit is controlled to stop outputting the low level signal, and when the pull-down circuit is controlled to output the low level signal, the pull-up circuit is controlled to stop outputting the high level signal. Since the shift register according to the present disclosure has a simpler structure, a single stage of gate driving circuit GOA has a smaller layout area, which is advantageous for display with a narrow bezel.