Shift Register Q Node Discharge Circuit for Display Line Defects
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Solution Overview
Problem
Current display devices suffer from line defects due to incomplete discharge of current in shift register stages during the non-display period, causing some display lines to be activated during the non-display period.
Innovation Solution
A shift register with n stages, each capable of forward and reverse operations, includes a charging unit, a gate signal output unit, and a discharging unit, featuring a dummy transistor and a reverse start transistor to ensure complete discharge of the Q node after the gate signal is output, preventing line defects during the non-display period.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the shift register operates during the display period, then gate signals are supplied to display lines, but current remains charged in some stages and causes line defects during the non-display period
Solution Approach 1:
The patent applies preliminary action by introducing a discharging unit that operates before the non-display period begins. The discharging unit proactively discharges current from the Q node of each stage during the transition period, preventing residual current from causing line defects in the subsequent non-display period. This preliminary discharge action eliminates the harmful effect before it can manifest.
Solution Approach 2:
The discharging unit acts as an intermediary component between the charging operation during the display period and the non-display period. It provides a controlled discharge path through transistors (such as the seventh transistor T7 and third transistor T3 in the embodiments) to safely release residual current, mediating the transition and preventing direct harmful effects on display lines.
2Productivity
If the shift register stages charge current during the display period, then gate signals are generated, but the current is not fully discharged before the non-display period begins
Solution Approach 1:
The patent segments the current control function into separate charging and discharging operations. The charging unit (including transistors like T1, T2) handles current input during the display period, while the discharging unit (including transistors like T3, T7) handles current discharge during the transition period. This segmentation allows each unit to specialize in its function, ensuring complete discharge without compromising charging speed.
Solution Approach 2:
The patent implements periodic action by alternating between charging phases (during display period) and discharging phases (during transition period). The shift register stages undergo repeated cycles of charging gate signals for display operation followed by discharging to prepare for the non-display period. This periodic charge-discharge cycle ensures current is fully discharged before each non-display period while maintaining high productivity during display periods.
Data Source
AI summary
The present disclosure provides a shift register, the register including n stages, each being configured for performing forward and reverse operations, wherein in the forward operation, a gate signal is output in a forward direction, wherein in the reverse operation, a gate signal is output in a reverse direction, wherein a n-th stage among the n stages includes: a charging unit configured for charging a Q node in a response to a reception of a forward start signal or a reverse start signal; a gate signal output unit configured for outputting a gate signal in a response to the Q node being charged by the charging unit; and a discharging unit configured for discharging the Q node after the output unit has outputted the gate signal, wherein the charging unit includes a dummy transistor and a reverse start transistor, both being connected to the Q node.