Shift Register Reset Mechanism for Gate Driving Circuit
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Solution Overview
Problem
Existing gate driving circuits have high output load and deteriorated output signal waveforms due to the reliance on output signals from next stages to reset previous stages in shift register units, leading to inefficient driving capability and display quality.
Innovation Solution
A shift register design where the pull-up node of an (n+k)-th stage is connected to the pull-up node reset terminal of an n-th stage, allowing the reset of the n-th stage's potential without requiring an output signal from the next stage, thereby improving the driving capability of the gate driver and display quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the reset of a previous stage of shift register unit is enabled by an output signal of a next stage of shift register unit, then the shift register unit can be cascaded to form a gate driving circuit, but the signal output terminal of each stage bears a high output load causing deteriorated output signal waveform
Solution Approach 1:
The patent divides the shift register into multiple independent groups, where each group contains multiple stages. Within each group, the reset signal is generated internally by a dedicated reset generation unit rather than being dependent on output signals from subsequent stages. This segmentation isolates the output terminals from the reset function, reducing their load and improving signal waveform quality while maintaining the cascaded structure for gate driving.
2Productivity
If the output signal of next stage is used to reset previous stage, then the shift register can operate sequentially, but the driving capability becomes insufficient and charging efficiency of pixel units deteriorates
Solution Approach 1:
The patent implements a preliminary reset mechanism where the reset signal is generated in advance within each group by a reset generation unit, rather than waiting for the output signal from the next stage. This preliminary action ensures that the output terminal is ready to provide strong driving capability without being burdened by the reset function, thereby improving both the sequential operation reliability and the charging efficiency of pixel units.
Data Source
AI summary
A shift register is disclosed which includes at least one shift register unit group. Each shift register unit group includes a plurality of stages of shift register units cascaded to one another, each of the plurality of stages of shift register units including a pull-up node and a pull-up node reset terminal. The pull-up node of an (n+k)-th stage of shift register unit of each shift register unit group is connected to the pull-up node reset terminal of an n-th stage of shift register unit of the shift register unit group. Also disclosed are a gate driving circuit and a display apparatus.