Shift Register Ripple Reduction Circuit Design
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Solution Overview
Problem
High-resolution display panels face issues with ripples caused by clock signals in shift register circuits, leading to incorrect operations and charging of pixels, which becomes more critical as data transmission time shortens.
Innovation Solution
A shift register design incorporating a ripple reduction circuit with a first switch, input circuit, pull-down circuit, and capacitors to suppress ripples by using clock signals with opposite phases, ensuring the switch does not turn on mistakenly and maintaining the correctness of the scan signal waveform.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the clock signal switches between high voltage level and low voltage level periodically to drive the shift register circuit, then the scan signal can be generated and transmitted, but ripples are induced on the internal reference voltage node due to the coupling effect on the first switch, causing wrong operations
Solution Approach 1:
The patent introduces a ripple reduction circuit as an intermediary component between the first switch and the internal reference voltage node. This circuit includes a second switch, third switch, fourth switch, first capacitor, and second capacitor that work together to filter and stabilize the voltage at the internal reference node, preventing ripples from propagating and causing incorrect switch operations while maintaining the high-speed clock signal functionality.
Solution Approach 2:
The ripple reduction circuit is designed to preemptively counteract the coupling effects before they can cause harmful ripples. By positioning capacitors and switches in advance to detect and compensate for voltage fluctuations at the internal reference node, the circuit prevents wrong operations before they occur, rather than correcting them after the fact.
2Manufacturing precision
If the resolution of the display panel is increased to improve image quality, then more pixels need to be controlled, but the time for the source driver to transmit pixel information is shortened, making ripple effects more critical
Solution Approach 1:
The patent utilizes periodic clock signals with opposite phases (first clock signal and second clock signal) to drive the shift register circuit. This periodic action allows the ripple reduction circuit to operate in sync with the clock cycles, using the regular timing to predict and counteract ripple effects at specific phases of the clock signal, thereby maintaining stable operation even with reduced transmission time for high-resolution displays.
3Reliability
If the first switch turns on mistakenly due to ripples when the clock signal changes, then wrong scan signal waveform is generated, but the ripple reduction circuit prevents this by suppressing ripples on the internal reference voltage node
Solution Approach 1:
The patent divides the ripple reduction function into multiple independent components: a second switch for voltage control, a third switch for signal routing, a fourth switch for timing control, a first capacitor for filtering, and a second capacitor for stabilization. Each component handles a specific aspect of ripple suppression, allowing the complex function to be modularized and making the overall circuit more manageable and maintainable despite the increased complexity.
Data Source
AI summary
A shift register includes a plurality of shift register circuits. Each of the shift register circuits includes a first switch, an input circuit, a pull-down circuit and a ripple reduction circuit. The first switch is used to output a scanning signal of the shift register circuit according to voltage levels of a node and a clock signal. The input circuit is used to pull up the voltage level of the node according to a scanning signal of a previous shift register circuit. The pull-down circuit is used to pull down the voltage levels of the node and the scanning signal of the shift register circuit according to a scanning signal of a following shift register circuit. The ripple reduction circuit is used to suppress ripples on the voltage levels of the node and the scanning signal caused by the coupling effect of the clock signal.