Shift Register Circuit for Narrow Bezel Display
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Solution Overview
Problem
Current scan driving circuits in display apparatuses have complex structures and occupy large areas, leading to increased bezel sizes and manufacturing complexities, which hinder the achievement of narrow bezel designs and efficient display performance.
Innovation Solution
A shift register with a simplified structure, comprising input, output, and control circuits connected in a specific configuration, including transistors and capacitors, to efficiently transmit clock and voltage signals, thereby reducing the complexity and area occupied by the scan driving circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a conventional scan driving circuit is used, then the display apparatus can function properly, but the circuit structure becomes complex and occupies large area
Solution Approach 1:
The scan driving circuit is divided into multiple independent shift registers, each responsible for a specific row or column of pixels. Each shift register contains separate control circuits (first control circuit for node Q1, second control circuit for node Q2) that operate independently, simplifying the overall structure while maintaining functionality through modular organization
Solution Approach 2:
The shift register circuit is designed to perform multiple functions: it receives clock signals (CLK, SC1, SC2), generates scanning signals for multiple output terminals, and maintains signal integrity through dual control circuits. This multi-functional design reduces the need for separate dedicated circuits for each function
2Area of stationary object
If the scan driving circuit area is reduced, then narrow bezel design is achieved, but manufacturing complexity increases
Solution Approach 1:
Multiple control functions are merged into a single shift register unit. The first control circuit (controlling node Q1) and second control circuit (controlling node Q2) are integrated within the same shift register, sharing common transistors and capacitors where possible, which reduces total area while maintaining manufacturing simplicity
Solution Approach 2:
The circuit uses voltage level changes at control nodes Q1 and Q2 to regulate transistor switching. By changing voltage parameters dynamically through the control circuits, the circuit achieves complex control functionality with simple hardware components, easing manufacturing
3Reliability
If more control circuits are added to improve scanning signal accuracy, then signal reliability improves, but the circuit area increases
Solution Approach 1:
The control circuits are nested within the shift register structure. The first control circuit is nested to control node Q1, and the second control circuit is nested to control node Q2, with both circuits sharing the same physical space and resource components within the shift register unit, minimizing area overhead
Data Source
AI summary
A shift register includes: an input circuit electrically connected to a first clock signal terminal, a first voltage signal terminal and a first node; a first output circuit electrically connected to the first node, a second clock signal terminal and a scanning signal terminal; a first control circuit electrically connected to a third clock signal terminal, a fourth clock signal terminal, a fifth clock signal terminal and the first node; a second control circuit electrically connected to a sixth clock signal terminal, a second voltage signal terminal, the first node, the first voltage signal terminal and a second node; a third control circuit electrically connected to the first node, the second voltage signal terminal, the third clock signal terminal and the second node; and a second output circuit electrically connected to the second node, the second voltage signal terminal and the scanning signal terminal.