Shift Register Scan Switching for Flexible Sub-Pixel Lighting Order
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Solution Overview
Problem
Current display technologies face challenges in switching the lighting order of sub-pixels without altering the hardware architecture, which limits the ability to meet diverse user preferences for display styles, such as 'Z'-shaped and ''-shaped architectures, leading to increased development costs.
Innovation Solution
A shift register design that includes input, reset, and output circuits, along with selection and denoising circuits, allows for the exchange of scan signal waveforms between adjacent rows, enabling the change in lighting order without modifying the array substrate's hardware, by controlling the output of clock signals based on control signals and node voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the hardware architecture of the array substrate is modified to change the lighting order of sub-pixels, then different display styles can be achieved, but the development cost increases
Solution Approach 1:
The patent implements dynamic control of the scan signal waveform through software/firmware control signals that can switch between different lighting patterns (Z-shaped, S-shaped, sequential, etc.) without any hardware modifications. The shift register circuit dynamically adjusts its operation mode based on control signals, allowing the display to adapt different lighting orders while maintaining the same hardware architecture.
Solution Approach 2:
The patent changes the parameters of the scan signal waveform (timing, sequence, pattern) through electrical control rather than modifying hardware architecture. By varying the control signals to the shift register, different lighting patterns are achieved through parameter adjustment of the scan signals, enabling multiple display styles from a single hardware configuration.
2Ease of manufacture
If a single hardware architecture is used for the array substrate, then development cost is reduced, but the ability to meet diverse user preferences for display styles is limited
Solution Approach 1:
The patent makes the shift register circuit multi-functional by enabling it to operate in multiple modes (different lighting patterns) using a single hardware architecture. The same shift register circuit can generate various scan signal waveforms (Z-shaped, S-shaped, sequential, inverse sequential) based on control signals, making the display system universal and adaptable to different user preferences without requiring multiple hardware configurations.
Solution Approach 2:
The patent introduces dynamic reconfigurability to the shift register circuit, allowing it to change its operation mode on-the-fly based on control signals. This dynamic capability enables a single static hardware architecture to deliver multiple dynamic display styles, satisfying diverse user preferences while maintaining manufacturing simplicity and low development cost.
3Adaptability or versatility
If the scan signal waveform is exchanged between adjacent rows, then sub-pixel lighting order can be changed, but the circuit complexity increases
Solution Approach 1:
The patent merges the waveform exchange function into the existing shift register circuit by utilizing its inherent clock signal inputs and control signal terminals. Instead of adding separate waveform exchange circuits, the invention combines multiple functions (signal shifting, waveform generation, pattern switching) into the single shift register module, achieving lighting order switching without proportionally increasing circuit complexity.
Solution Approach 2:
The shift register circuit performs self-service by internally generating and exchanging the scan signal waveforms between adjacent rows using its own structure and components. The circuit uses its existing clock signal terminals and control signal terminals to autonomously implement the waveform exchange function, reducing the need for additional external control circuits and minimizing overall system complexity.
Data Source
AI summary
The present disclosure provides a shift register, a drive method thereof, and a gate drive circuit. The shift register includes an input circuit, a reset circuit, a first output circuit, and a second output circuit. The input circuit is configured to provide an input signal from an input terminal to a first node. The reset circuit is configured to provide a first voltage from a first voltage terminal to the first node under the control of a reset signal from a reset signal terminal. The first output circuit is configured to output from a first output terminal one of a first clock signal and a second clock signal as a first scan signal. The second output circuit is configured to output from a second output terminal the other of the first clock signal and the second clock signal as a second scan signal.