Display Substrate Shift-Register Layout for High-Resolution Narrow Bezels
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Solution Overview
Problem
Related display products struggle to achieve narrow bezels while maintaining high resolution due to limited layout space for shift register units as pixel pitch values decrease.
Innovation Solution
A display substrate design with a specific arrangement of signal lines in shift register units, where the ratio of signal line widths to shift register unit width, combined with pixel pitch, is optimized to be between 18 um and 40 um, allowing for narrow bezel designs in high-resolution displays.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If pixel resolution is increased and pixel pitch value is reduced, then display resolution is improved, but layout space for shift register unit is reduced
Solution Approach 1:
The patent applies multi-layer stacking to arrange signal lines in different layers (first conductive layer and second conductive layer), transforming a two-dimensional layout problem into a three-dimensional solution. This allows multiple signal lines to be packed into a smaller footprint by utilizing the vertical dimension, thereby maintaining high pixel resolution while reducing the layout space required for the shift register unit.
Solution Approach 2:
The patent merges multiple signal lines into a single shift register unit by arranging them in close proximity and sharing common conductive layers. This consolidation reduces the overall area occupied by the shift register unit while maintaining all necessary signal connections, enabling narrow bezel designs in high-resolution displays.
2Area of stationary object
If multiple signal lines are arranged in one shift register unit, then layout space is reduced, but manufacturing complexity increases
Solution Approach 1:
The patent segments the arrangement of signal lines into distinct groups based on their functional requirements, with different signal lines assigned to different conductive layers. This segmentation allows for systematic manufacturing processes where each layer can be fabricated independently using standard semiconductor manufacturing techniques, reducing the overall complexity despite the compact integration.
Data Source
AI summary
A display substrate includes a base substrate including a display area and a peripheral area on at least one side of the display area; a pixel array, located in the display area and including multiple pixel units; and, a scan driving module, located in a driving circuit area of the peripheral area, and including multiple shift register units, multiple signal lines being arranged in one shift register units, and extending along a first direction; wherein a ratio of a sum W1 of widths of the multiple signal lines in a second direction to a width W2 of the shift register unit in the second direction is W1/W2, and a length of at least one pixel unit along the first direction is a pixel pitch value; the first direction intersects the second direction; a product of W1/W2 and the pixel pitch value is greater than 18 um and less than 40 um.


