Shift Register Unit Signal Separation for Gate Driving Accuracy
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Solution Overview
Problem
In Thin Film Transistor Liquid Crystal Display (TFT-LCD) gate driving devices, delay accumulation in shift register units leads to reduced accuracy of gate driving signals due to load effects on gate lines and the need for signal transmission between neighboring units.
Innovation Solution
A shift register unit design comprising specific thin film transistors and a capacitor, where the second signal output terminal is used to provide a control signal to the next neighboring unit, separate from the gate line load, reducing delay and improving signal accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the gate driving signal is transmitted through the gate line to drive the pixel area, then the gate lines can be driven, but the load on the gate lines causes signal delay
Solution Approach 1:
The patent divides the signal output function into two separate terminals: the first signal output terminal for driving the gate line, and the second signal output terminal for providing the control signal to the next shift register unit. This segmentation allows the control signal path to be separated from the heavy-loaded gate line path, reducing signal delay in the control path while maintaining gate line driving capability.
2Ease of operation
If the gate driving signal output by one shift register unit is input to the next neighboring shift register unit as a control signal, then the next unit can be controlled, but this results in larger delay and delay accumulation
Solution Approach 1:
The patent separates the control signal output function from the gate line driving function by providing a dedicated second signal output terminal. This terminal is specifically designed to provide control signals to neighboring shift register units with minimal load, thereby reducing the delay accumulation that would occur if the same terminal had to serve both functions.
3Device complexity
If a single output terminal is used for both gate line driving and control signal output, then the device structure is simpler, but the signal accuracy is reduced due to load effects
Solution Approach 1:
The patent implements segmentation by providing two separate output terminals: the first signal output terminal connected to the source of the first thin film transistor for gate line driving, and the second signal output terminal connected to the source of the third thin film transistor for control signal output. This segmentation resolves the conflict between device simplicity and signal accuracy by distributing functions to specialized terminals.
Solution Approach 2:
The patent applies local quality by optimizing each output terminal for its specific function. The first signal output terminal is designed with the first thin film transistor to handle the gate line driving load, while the second signal output terminal is designed with the third thin film transistor to provide low-delay control signals. Each terminal has tailored characteristics suitable for its specific purpose, improving overall signal accuracy.
Data Source
AI summary
The present invention provides a shift register unit, a gate driving device and a liquid crystal display, wherein the shift register unit includes five thin film transistors. The drain of a first thin film transistor is connected to a first clock signal input terminal; the drain of a third thin film transistor is connected to the first clock signal input terminal, the gate thereof is connected to the gate of the first thin film transistor, and the source thereof is connected to a second signal output terminal. The shift register unit, the gate driving device and the liquid crystal display provided by the present invention separate the gate driving signal and the control signal for controlling the next neighboring shift register unit from each other, which can solve the problem that the accuracy of the gate driving signal is low due to the delay accumulation.