Shift Register With Single Clock Signal Reducing Complexity
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Solution Overview
Problem
Conventional shift registers in electronic systems, particularly in display panels, face complexity and inefficiency in signal shifting due to the need for multiple input signals and levels, which increases the overall complexity and reduces reliability.
Innovation Solution
The proposed electronic system incorporates a shift register design with a power transforming unit and a display panel, utilizing a gate driver and source driver with a simplified shift register structure comprising transistors and trigger circuits that reduce complexity by using a minimal number of input signals and levels, allowing efficient signal shifting with reduced complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional shift registers use multiple input signals and multiple clock signals to achieve signal shifting, then the signal shifting function is realized, but the device complexity increases
Solution Approach 1:
The patent combines multiple control functions into a single clock signal. The clock signal serves multiple purposes: it controls the timing of data input, the timing of signal output, and the overall synchronization of the shift register operation. This merging of control functions reduces the number of separate control signals needed, thereby simplifying the device complexity while maintaining reliable signal shifting functionality.
Solution Approach 2:
The single clock signal in the invention performs multiple functions that would traditionally require separate signals. It simultaneously acts as an input timing reference, an output timing reference, and a synchronization signal for the entire shift register circuit. This multi-functionality approach reduces the overall number of control signals needed, resolving the contradiction between reliability and device complexity.
2Productivity
If conventional shift registers use multiple control signals for operation, then the signal shifting capability is enhanced, but the ease of operation deteriorates
Solution Approach 1:
The patent merges multiple control signal requirements into a single clock signal that governs all operations of the shift register. This single clock signal coordinates data input timing, output timing, and internal signal propagation, making the operation simpler while maintaining high signal shifting efficiency. The ease of operation is improved because users only need to provide one clock signal rather than multiple coordinated control signals.
3Adaptability or versatility
If conventional shift registers require multiple input signals, then the signal processing capability is improved, but the device complexity increases
Solution Approach 1:
The single clock signal in the invention serves as a universal control reference for all signal processing operations within the shift register. It provides timing information for data input, timing for output generation, and synchronization for internal circuit operations. This universal timing reference maintains versatile signal processing capability while reducing the number of control signal lines required, thereby reducing device complexity.
Data Source
AI summary
An electronic system including a shift register is disclosed. The shift register includes a first transistor, a first trigger circuit, a second transistor, and a second trigger circuit. The first transistor receives a first input signal. The first trigger circuit is serially connected to the first transistor between a first level and a second level and is connected with the first transistor in a first node. The second transistor receives a second input signal inverted to the first input signal. The second trigger circuit receives the level of the first node, is serially connected to the second transistor between a third level and the second level, and is connected with the second transistor in a second node.