Single-Stage Shift Register Unit Circuit Design
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Solution Overview
Problem
Existing shift register units in display apparatuses are complex due to the large number of transistors required, complicating their structure and operation.
Innovation Solution
A simplified shift register unit design using a single stage of circuit comprising 7 transistors and 3 capacitors, which ensures normal operation by employing a specific configuration of transistors and capacitors connected to clock and data signal terminals to control output levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a traditional two-stage circuit design is used in the shift register unit, then the operational reliability is ensured, but the device complexity increases due to the larger number of transistors
Solution Approach 1:
The patent merges the functions of two separate circuit stages into a single integrated circuit stage. The input module and output module are combined in one stage, sharing common transistors (M1-M4) and signal lines. This consolidation reduces the total transistor count from 12 to 7 while maintaining the shift register's operational reliability through careful design of the combined circuit's signal flow and timing.
Solution Approach 2:
The transistors in the single-stage circuit perform multiple functions. For example, transistors M1-M4 serve both as input switching elements and as part of the output drive circuitry. The clock signal terminals (Clk1, Clk2) and data carry terminal (STV) are shared between input and output functions, making each component multi-functional and reducing overall device complexity.
2Adaptability or versatility
If more transistors are used in the shift register unit, then the functional completeness is improved, but the ease of manufacture deteriorates due to the complicated structure
Solution Approach 1:
By merging input and output circuit functions into a single stage with 7 transistors, the patent reduces the manufacturing complexity compared to fabricating two separate stages with 12 transistors. The reduced transistor count simplifies the photolithography and doping processes while maintaining all necessary shift register functions through the integrated design.
Solution Approach 2:
The patent changes the circuit design parameters by reducing the transistor count from 12 to 7 while adjusting the wiring configuration and signal timing parameters. This parameter optimization maintains functional completeness (data shifting, clocking, and output capabilities) while improving ease of manufacture through a simpler, more compact circuit structure.
3Device complexity
If a single stage of circuit is used in the shift register unit, then the device complexity is reduced, but the reliability may be compromised compared to two-stage designs
Solution Approach 1:
The single-stage circuit incorporates built-in protection mechanisms through its design. The complementary transistor pairs (M1-M2, M3-M4) and the capacitive coupling between stages provide inherent noise immunity and signal integrity protection. The clock signal timing and the data carry signal coordination beforehand prevent erroneous state transitions, cushioning against potential reliability issues that might arise from the simplified single-stage architecture.
Data Source
AI summary
Disclosed are a shift register unit and a driving method thereof, a shift register and a display device. The shift register unit comprises: an input module (P1), which connected to a first clock signal end (Clk1), a second clock signal end (Clk2) and a data carry signal end (STV) and is used for providing a selection signal according to signals input via the first clock signal end (Clk1), the second clock signal end (Clk2) and the data carry signal end (STV); and an output module (P2), which is connected to a high level end (VGH), a low level end (VGL), and an output end (Output) of the shift register unit and is used for selectively outputting a high level or a low level at the output end (Output) according to the selection signal provided by the input module (P1). The shift register comprises a plurality of stages of shift register units, and the display device comprises a shift register. The normal operation of a shift register unit can be ensured by utilizing only one stage of circuit, so that a circuit structure of the shift register unit is simplified.