Shift Register Unit Preventing Signal Smearing in AMOLED Gate Drivers
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Solution Overview
Problem
In AMOLED display devices, the threshold voltage of transistors in shift register units leads to signal smearing, resulting in poor output stability due to the appearance of steps when the gate drive signal potential jumps.
Innovation Solution
A shift register unit is designed with multiple input and control circuits that manage connections and disconnections based on clock signals, power signals, and node potentials, ensuring stable potential transmission and preventing signal smearing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional shift register unit is used in AMOLED display devices, then the device structure is simple, but signal smearing occurs due to transistor threshold voltage, resulting in poor output stability
Solution Approach 1:
The shift register unit is divided into multiple independent circuits: first and second input circuits, first and second control circuits, and an output circuit. Each circuit performs a specific function in the signal transmission chain, allowing precise control of potential levels at different stages to prevent signal smearing while maintaining overall system reliability.
Solution Approach 2:
The patent introduces intermediate control circuits between the input and output stages that act as mediators to adjust and stabilize potential levels. These control circuits receive clock signals and power signals to dynamically control the connection states of transistors, ensuring stable signal transmission despite threshold voltage variations.
2Ease of manufacture
If transistor threshold voltage variations are present, then the device is easier to manufacture, but signal smearing occurs when gate drive signal potential jumps
Solution Approach 1:
The patent dynamically changes the potential parameters at different nodes by controlling the connection states of transistors through clock and power signals. By adjusting the potential levels at intermediate nodes (first node, second node, third node, fourth node, fifth node), the circuit compensates for threshold voltage variations and prevents signal smearing while maintaining manufacturing simplicity.
Solution Approach 2:
The circuit employs dynamic control of transistor connection states based on clock signals and power signals. The input and control circuits continuously adjust their connection configurations in response to changing potential levels, enabling the system to adapt to threshold voltage variations and maintain precise signal transmission throughout operation.
Data Source
AI summary
Provided is a shift register unit. The shift register unit includes: a first input circuit, coupled to a first clock terminal, an input terminal, a first node and a second node; a second input circuit, coupled to the first node, the first clock terminal, a first power terminal and a third node; a first control circuit, coupled to the input terminal, the first clock terminal, the second node, a second power terminal, a second clock terminal and the third node; a second control circuit, coupled to the third node, the second clock terminal, the first node, the first power terminal, the second power terminal, a fourth node and a fifth node; and an output circuit, coupled to the fourth node, the fifth node, the first power terminal, the second power terminal and an output terminal.