Shift Register Circuit Stabilizes LCD Output Signals
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Solution Overview
Problem
Conventional shift register circuits in liquid crystal displays (LCDs) face issues with unstable output signals due to incomplete discharge of capacitors, leading to voltage drift and incorrect image display, as they rely on a single duty cycle for pull-down mechanisms.
Innovation Solution
The proposed shift register circuit design incorporates multiple switch elements and pull-down units that utilize two continuous clock signals with different duty cycles to ensure complete discharge of capacitors, stabilizing the output signals and preventing voltage drift.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single duty cycle is used for the pull down mechanism, then the circuit structure is simple, but the capacitor discharge is incomplete leading to voltage drift and unstable output signals
Solution Approach 1:
The pull-down mechanism is segmented into two distinct pull-down units (first pull-down unit and second pull-down unit), each operating during different time periods. The first pull-down unit operates during the first time period when the second clock signal is at a first level, and the second pull-down unit operates during the second time period when the second clock signal is at a second level. This segmentation ensures complete capacitor discharge while maintaining reasonable circuit complexity.
Solution Approach 2:
The invention employs periodic action by utilizing two different time periods for the pull-down operations, synchronized with the clock signal cycles. The first pull-down operation occurs during one clock cycle phase, and the second pull-down operation occurs during the opposite phase, ensuring thorough and complete discharge of stored charges.
2Ease of operation
If the next stage output signal is used to pull down this stage, then the circuit operation is simplified, but the output signal becomes unstable and generates voltage drift
Solution Approach 1:
A dedicated pull-down control signal is introduced as an intermediary to control the pull-down operation, separate from the next stage output signal. This control signal is generated based on the clock signal and specifically triggers the pull-down units at appropriate times, ensuring stable output without relying solely on the next stage signal.
Solution Approach 2:
The pull-down operation is performed as a preliminary action before the output signal is read or before the next switching operation. By proactively discharging the capacitors during designated time periods controlled by the pull-down control signal, the circuit prevents voltage drift before it can affect output stability.
3Speed
If the pull down mechanism operates during the high voltage clock signal period, then the switching is synchronized, but the control terminal under high voltage negatively affects the switch element
Solution Approach 1:
The switching and pull-down operations are segmented into different time periods. The first pull-down unit operates during the first time period when the clock signal is at one level, and the second pull-down unit operates during the second time period when the clock signal is at the opposite level. This temporal segmentation prevents high voltage from negatively affecting the switch element during pull-down operations.
Solution Approach 2:
Instead of performing the pull-down operation during the high voltage clock signal period as in conventional designs, the invention inverts the timing by performing pull-down operations during opposite clock signal levels. This inversion eliminates the harmful interaction between high voltage and the pull-down mechanism while maintaining proper switching synchronization.
Data Source
AI summary
A shift register circuit including a first shift register unit, a second shift register unit, a third shift register unit, and a fourth shift register unit connected in serial. The second shift register unit includes an output terminal, and a pull down system pulling the voltage of the output terminal of the second shift register unit according to a pull down signal. The fourth shift register unit includes a third switch and a fourth switch. The fourth switch has a control terminal electrically coupled to the second terminal of the third switch and the pull down unit. The fourth shift register unit generates the pull down signal according to the voltage level of the connecting point between the third switch and the fourth switch.