Shift Register Unit Stabilizing Output Signals Using Constant Voltage

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Solution Overview

Problem

In Thin Film Transistor (TFT) based display technologies, such as OLED displays, the stability of output signals in gate driving circuits is compromised due to unstable clock signal levels, leading to fluctuations in output levels, which affect the reliability of the display.

Innovation Solution

A shift register unit is designed with sub-circuits that utilize constant voltage signals and clock signals to stabilize output levels, including input, control, output, and reset sub-circuits, ensuring stable transmission of signals through pull-down and pull-up nodes, and capacitors to maintain voltage differences for consistent output.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If clock signals are used to provide high and low levels for output signals, then the gate driving circuit can operate with simple signal generation, but the output signal levels become unstable

Engineering Contradiction:
Improveoutput signal stabilityVSAvoidcircuit structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces constant voltage signals (VGH and VGL) as intermediary elements that mediate between the clock signals and the output signals. These constant voltage signals serve as stable reference levels that replace the direct use of clock signal levels for output, thereby stabilizing the output signal levels while maintaining the circuit's operational functionality

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the parameter of voltage level stability by switching from using clock signal levels (which vary over time) to using constant voltage signal levels (which remain stable). This parameter change is achieved through the output sub-circuit that selects between different voltage levels based on clock signal control, fundamentally altering how output levels are determined

Inventive Principle:
Principle #35Parameter changes

2Reliability

If constant voltage signals are used to stabilize output levels, then output signal stability improves, but the circuit structure becomes more complex

Engineering Contradiction:
Improveoutput signal stabilityVSAvoidcircuit structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent achieves multi-functionality by having the constant voltage signals (VGH and VGL) serve multiple purposes: they provide stable reference levels for output, act as pull-up and pull-down voltages for node stabilization, and enable level restoration in the shift register stages. This universal use of constant voltage signals stabilizes output levels without requiring separate dedicated circuits for each function

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges the functions of signal generation, level stabilization, and output control into a unified circuit structure where constant voltage signals simultaneously perform multiple roles. The output sub-circuit combines the selection of constant voltage levels with the clock signal control logic, consolidating what could be separate functions into an integrated solution

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11468820B2Control circuit configuration for shift register unit, gate driving circuit and display device, and method for driving the shift register unit
Publication Date: 2022.10.11 BEIJING BOE TECH DEV CO LTD
  • US11468820B2 patent drawing
  • US11468820B2 patent drawing
  • US11468820B2 patent drawing

AI summary

The present disclosure provides a shift register unit and a method for driving the same, a gate driving circuit and a display device. The shift register unit includes: an input sub-circuit configured to receive an input control signal and an input signal, and transmit the input signal to a first pull-down node of the shift register unit under control of the input control signal; a first control sub-circuit configured to receive a first clock signal and electrically couple the first pull-down node to a second pull-down node of the shift register unit under control of the first clock signal; and an output sub-circuit configured to receive a first constant voltage signal and transmit the first constant voltage signal to an output terminal of the shift register unit under control of a voltage at the second pull-down node.