Shift Register Circuit for OLED Gate Drive Threshold Loss
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Solution Overview
Problem
In organic light emitting diode (OLED) and liquid crystal display (LCD) panels, the high pulse signals output by gate drive circuits with P-type thin film transistors suffer from threshold loss, leading to inaccurate display effects and reduced quality due to the nature of P-type thin film transistors.
Innovation Solution
A shift register and gate drive circuit design that includes a third power terminal to output a DC power signal, allowing P-type thin film transistors to produce low-level signals without threshold loss, while maintaining a simple structure and low production costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If P-type thin film transistors are used in gate drive circuits to output high pulse signals, then the display device can be manufactured with lower cost and simpler structure, but the output signals suffer from threshold loss leading to reduced display quality
Solution Approach 1:
The output circuit is divided into two independent sub-circuits: a first output sub-circuit for outputting high-level signals and a second output sub-circuit for outputting low-level signals. This segmentation allows each sub-circuit to be optimized for its specific function, enabling P-type transistors to output low-level signals without threshold loss while maintaining the overall simplicity of the gate drive circuit structure
Solution Approach 2:
A third power terminal is introduced as an intermediary power supply source specifically for the second output sub-circuit. This third power terminal provides a reference potential that enables the P-type transistor to output low-level signals without undergoing the typical threshold voltage drop, thereby acting as a mediator that resolves the threshold loss problem while maintaining circuit simplicity
2Manufacturing precision
If a third power terminal is added to the shift register to enable low-level signal output without threshold loss, then signal accuracy is improved, but device complexity increases
Solution Approach 1:
The third power terminal is designed with multi-functionality: it serves as the power supply for the second output sub-circuit, provides a reference potential for low-level signal output, and enables P-type transistors to output signals without threshold loss. By consolidating these functions into a single power terminal, the design achieves high signal accuracy without proportionally increasing device complexity
Solution Approach 2:
The third power terminal is specifically applied to the second output sub-circuit that handles low-level signal output, rather than being applied universally to the entire shift register. This localized application ensures that the additional complexity is only introduced where necessary to solve the threshold loss problem, maintaining overall circuit simplicity
Data Source
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AI summary
A shift register and a driving method, a gate driving circuit and a display device. The shift register comprises: an input circuit (100), which is electrically connected to an input voltage terminal (STV) and a first clock signal terminal (CK), respectively, and is configured to input, under the control of a first clock signal provided by the first clock signal terminal (CK), an input voltage provided by the input voltage terminal (STV) to an intermediate circuit (200); the intermediate circuit (200), which is electrically connected to an intermediate output terminal (GOUT), a first power supply terminal (VGH), a second power supply terminal (VGL), the first clock signal terminal (CK) and a second clock signal terminal (CB), respectively, and is configured to write, under the control of the input voltage and a control circuit (300), into the intermediate output terminal (GOUT) a second clock signal outputted by the second clock signal terminal (CB) or a first power signal outputted by the first power supply terminal (VGH) so as to serve as an intermediate output signal; an output circuit (400), which is electrically connected to the first power supply terminal (VGH), the second power supply terminal (VGL), a third power supply terminal (VGL1), a third clock signal terminal (CK1), the intermediate output terminal (GOUT) and an output terminal (EOUT), respectively, and is configured to output an output signal inverted from the intermediate output signal. The shift register can improve the display quality of a display panel.