Shift Register Unit Total Reset Module for GOA Circuits
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Solution Overview
Problem
Conventional shift register units in gate driver on array (GOA) technology face challenges in achieving complete reset during the blanking period, leading to charge and signal residue, which affects picture display, especially when a total reset signal is not provided.
Innovation Solution
The proposed shift register unit incorporates a total reset module with multiple transistors and control modules that utilize timing sequences of control signals to alternately set and reset pull-up and pull-down nodes during the scanning and blanking periods, enabling self-contained total reset functionality without the need for an additional total reset signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional shift register units are used in GOA technology, then the circuit structure is simple, but charge and signal residue occur during the blanking period, affecting picture display quality
Solution Approach 1:
The shift register unit is segmented into multiple functional modules: a control module that receives control signals during scanning and blanking periods, a first pull-down module responsive to the control signal, a second pull-down module responsive to the inverted control signal, and a reset module. This segmentation allows independent optimization of each module's function to achieve complete reset while maintaining overall circuit simplicity.
Solution Approach 2:
The control module performs preliminary action by generating control signals during the scanning period that prepare the pull-up and pull-down nodes for the upcoming blanking period reset. The control signal is generated in advance to ensure that when the blanking period arrives, the nodes are already in the correct state for complete discharge, preventing charge residue before it occurs.
2Loss of energy
If a total reset signal is not provided in GOA circuits, then power consumption is reduced and circuit integration is improved, but the shift register unit cannot achieve complete reset during the blanking period
Solution Approach 1:
The shift register unit achieves self-service by generating its own control signals internally during the scanning period that automatically trigger the reset function during the blanking period. The control module generates the control signal based on the clock signal, and this control signal automatically activates the pull-down modules to discharge the nodes, eliminating the need for external total reset signals while maintaining complete reset functionality.
Solution Approach 2:
The circuit employs periodic action by using the clock signal to generate control signals that periodically activate the reset function during each blanking period. The control module receives the clock signal and generates control signals at specific phases, creating a periodic reset mechanism that synchronizes with the scanning operation and ensures complete discharge during each blanking interval without requiring additional power-consuming external reset signals.
3Reliability
If the control signal timing is optimized to enable complete reset during blanking period, then picture display quality is improved, but the control circuit complexity increases
Solution Approach 1:
The control module merges multiple functions into a single unit: it receives the clock signal, generates the control signal with proper timing, and outputs it to coordinate both the first and second pull-down modules. This merging simplifies the control circuit by consolidating timing generation and signal distribution functions, avoiding the need for separate timing generators and reducing overall control circuit complexity while achieving precise blanking period reset.
Data Source
AI summary
A shift register unit includes a signal input module, a first control module, a second control module, a signal output module and a total reset module. The total reset module is configured to control a potential of the pull-up node and a potential of the signal output terminal based on a potential of a first pull-down node, a potential of a second pull-down node and a level signal.