Shift Register Circuit Leakage Control via Transistor Ratio
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Solution Overview
Problem
Existing shift register circuits in display technologies face issues with leakage currents due to fluctuations in transistor structures, leading to poor display effects and horizontal black lines, especially when the voltage of the input signal exceeds a certain range or during process variations.
Innovation Solution
A shift register circuit is designed with a first pull-down control sub-circuit and a noise reduction sub-circuit, where the ratio of the width-to-length ratio of the second transistor to the first transistor is greater than 5:1, ensuring that the pull-up node is maintained at a high potential by preventing leakage, thus ensuring normal output and reducing defective rates in display products.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional transistor structures are used in shift register circuits, then device complexity is reduced, but leakage currents increase leading to poor display effects and horizontal black lines
Solution Approach 1:
The transistor structure is divided into multiple sub-circuits (first pull-down control sub-circuit and first noise reduction sub-circuit) with specific transistor configurations. This segmentation allows each sub-circuit to perform dedicated functions for leakage control and noise reduction, improving display reliability without requiring complete redesign of the entire transistor structure.
Solution Approach 2:
Different transistor structures are applied to different functional regions: the first pull-down control sub-circuit uses a specific transistor ratio configuration for leakage control, while the noise reduction sub-circuit uses another configuration for noise reduction. This local differentiation optimizes performance for each specific function while maintaining overall system reliability.
2Reliability
If transistor width-to-length ratios are adjusted to prevent leakage, then leakage currents are reduced, but manufacturing precision requirements increase
Solution Approach 1:
The patent specifies a width-to-length ratio range (5:1 to 10:1) for the transistors, providing a flexible parameter window that balances leakage control with manufacturing feasibility. This parameter optimization allows sufficient leakage prevention while accommodating normal manufacturing variations without requiring extreme precision.
3Reliability
If noise reduction sub-circuits are added to maintain pull-up node potential, then display defects are reduced, but device complexity increases
Solution Approach 1:
The noise reduction sub-circuit is integrated with the pull-down control sub-circuit to share common transistors and nodes. This merging approach allows both leakage control and noise reduction functions to be achieved within a unified circuit structure, reducing the overall complexity increase compared to completely separate circuits.
Solution Approach 2:
The first transistor serves multiple functions: it acts as part of the pull-down control sub-circuit for leakage prevention and simultaneously serves as part of the noise reduction sub-circuit. This multi-functionality reduces the total number of required transistors and simplifies the overall circuit structure while maintaining both protective functions.
Data Source
AI summary
A shift register circuit includes a first pull-down control sub-circuit and a first noise reduction sub-circuit. The first pull-down control sub-circuit includes a first transistor and a second transistor, and a ratio of a width-to-length ratio of a channel of the second transistor to a width-to-length ratio of a channel of the first transistor is greater than 5:1. The first pull-down control sub-circuit transmits, in response to a first voltage signal received at a first voltage signal terminal, the first voltage signal to a first pull-down node through the first transistor, and transmits a second voltage signal received at a second voltage signal terminal to the first pull-down node through the second transistor under control of a voltage of a pull-up node. The first noise reduction sub-circuit transmits the second voltage signal to the pull-up node under control of a voltage of the first pull-down node.


