Shift Register Unit Transistor Reduction for AMOLED Reliability
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Solution Overview
Problem
Existing shift register units in display technology, particularly for Active Matrix Organic Light Emitting Diode (AMOLED) panels, are complex in circuit structure and include a large number of transistors, making them inefficient and prone to reliability issues.
Innovation Solution
A simplified shift register unit design that reduces the number of transistors by eliminating the need for a transistor connected to the clock control signal input terminal, allowing the first sensing input circuit to be controlled solely by the sensing control node voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the existing shift register unit design is used, then the circuit can perform sensing and driving functions, but the circuit structure becomes complex and includes a large number of transistors
Solution Approach 1:
The patent extracts and eliminates the transistor connected to the clock control signal input terminal from the sensing input circuit. By removing this unnecessary transistor, the circuit structure is simplified while maintaining the sensing function, as the sensing control node voltage alone is sufficient to control the sensing input circuit's operation.
Solution Approach 2:
The sensing control node voltage is designed to serve multiple functions: it controls both the sensing input circuit and the driving output circuit. This multi-functional control approach reduces the need for separate control transistors and simplifies the overall circuit structure while maintaining reliable operation.
2Adaptability or versatility
If a large number of transistors are used in the shift register unit, then the circuit can achieve complete functionality, but the number of transistors increases making the circuit inefficient and prone to reliability issues
Solution Approach 1:
The patent removes the redundant transistor connected to the clock control signal input terminal, reducing the total transistor count while preserving all necessary sensing and driving functions. This extraction of unnecessary components directly decreases the quantity of transistors without compromising circuit adaptability.
Solution Approach 2:
The patent merges the control functions into the sensing control node voltage, which simultaneously controls both the sensing input circuit and the driving output circuit. This consolidation reduces the number of separate control transistors needed, thereby reducing the total transistor quantity while maintaining complete functionality.
3Ease of operation
If more transistors are included in the shift register unit, then the circuit can perform all required operations, but the circuit complexity increases and reliability decreases
Solution Approach 1:
By extracting and removing the transistor connected to the clock control signal input terminal, the patent reduces the number of potential failure points in the circuit. This simplification maintains ease of operation through the sensing control node voltage while improving reliability by minimizing transistor stress and potential failure sources.
Data Source
AI summary
The present disclosure provides shift register unit, including: sensing control circuit connected to sensing signal input terminal, random signal input terminal, and sensing control node, and configured to write signal provided by sensing signal input terminal to sensing control node in response to active level signal provided by random signal input terminal; first sensing input circuit connected to clock control signal input terminal, sensing control node, and first pull-up node, and configured to write signal provided by clock control signal input terminal to first pull-up node only in response to active level signal at sensing control node; and first driving output circuit connected to first pull-up node, first driving clock signal input terminal, and first driving signal output terminal, and configured to write signal provided by first driving clock signal input terminal to first driving signal output terminal in response to active level signal at first pull-up node.