Shift Register Unit for Ultra-Narrow Display Frame

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Solution Overview

Problem

The increasing resolution and number of pixel units in display panels require more wiring space for gate driving circuits, making it difficult to achieve ultra-narrow or frameless displays without increasing the frame size.

Innovation Solution

A shift register unit and gate driving circuit design that includes multiple modules (input, reset, pull-up, pull-down, and output) with specific transistor and capacitor configurations, allowing for efficient gate scan signal generation and reduced wiring needs by using cascaded shift register units with alternating clock signals, enabling scanning of gate lines without expanding the frame area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the resolution and number of pixel units in display panels are increased, then the display quality is improved, but the wiring space required for gate driving circuits increases, making it difficult to achieve ultra-narrow or frameless designs

Engineering Contradiction:
Improvedisplay resolutionVSAvoidframe area
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The gate driving circuit is divided into multiple shift register units, each responsible for driving a specific section of gate lines. This segmentation allows the circuit to be distributed more efficiently across the display panel, reducing the concentration of wiring in any single area and enabling narrower frame designs while supporting high resolution displays.

Inventive Principle:
Principle #1Segmentation

2Productivity

If more shift register units are added to handle higher resolution, then the gate line scanning capability is improved, but the wiring space and device complexity increase

Engineering Contradiction:
Improvegate line scanning capabilityVSAvoidcircuit complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

Adjacent shift register units share common transistors and capacitors through a merged circuit architecture. Specifically, the pull-down control module in one unit shares components with neighboring units, allowing multiple gate lines to be scanned while reusing the same physical components. This merging reduces the total component count and wiring complexity while maintaining the ability to scan all gate lines for high-resolution displays.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The shift register units are designed with universal components that can serve multiple functions. The pull-down control module and associated transistors can control multiple gate lines sequentially, and the circuit architecture allows the same hardware to be reused across different scanning phases, reducing overall device complexity while handling high-resolution requirements.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Ease of manufacture

If the frame area is increased to accommodate wiring space, then the wiring space for gate driving circuits is sufficient, but the display panel cannot achieve ultra-narrow or frameless design

Engineering Contradiction:
Improvewiring space sufficiencyVSAvoidframe width
Core Design Contradiction:
Ease of manufactureVSLength of stationary object

Solution Approach 1:

The circuit layout transitions from a planar two-dimensional arrangement to a three-dimensional stacked configuration. By utilizing vertical stacking of transistors and capacitors, the patent reduces the horizontal wiring space requirement, allowing the gate driving circuit to fit within a narrower frame area while maintaining sufficient wiring capacity for high-resolution displays.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS9990897B2Shift register unit, gate driving circuit and driving method thereof, and array substrate
Publication Date: 2018.06.05 BOE TECHNOLOGY GROUP CO LTD
  • US9990897B2 patent drawing
  • US9990897B2 patent drawing
  • US9990897B2 patent drawing

AI summary

A shift register unit is provided. The shift register unit includes a first input module configured to output a first voltage signal as a pull-up control signal under the control of a first signal, a first reset module configured to reset the pull-up control signal under the control of a first reset signal, a pull-up module configured to output a first clock signal under the control of the pull-up control signal, a pull-down control module configured to output a second clock signal as a pull-down control signal under the control of a second clock signal, a pull-down module configured to pull down a voltage of the pull-up control signal, a first output module, and a second output module.