Shift Register Unit for Display Gate Driving Signal Control
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Solution Overview
Problem
Existing gate driving circuits face challenges in simultaneously outputting a gate driving signal during the display phase and a compensation driving signal during the field blanking phase, with different signal periods and pulse widths, which complicates circuit arrangements and control.
Innovation Solution
A shift register unit is designed with a first input sub-circuit to control a first node's potential, a second input sub-circuit to control a second node's potential, and a first isolation sub-circuit to manage electrical coupling between the nodes, allowing the output sub-circuit to generate a gate driving signal in the display phase and a compensation driving signal in the field blanking phase.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If the gate driving circuit outputs both gate driving signal and compensation driving signal simultaneously, then the control complexity increases, but the circuit arrangement becomes complicated
Solution Approach 1:
The patent segments the driving signals into two distinct phases: display phase for gate driving signals and field blanking phase for compensation driving signals. This temporal segmentation allows the same circuit to handle different signal types without increasing structural complexity, resolving the contradiction between ease of control and circuit arrangement complexity
Solution Approach 2:
The patent employs periodic action by alternating between display phase and field blanking phase in a cyclic manner. The gate driving circuit periodically switches between outputting gate driving signals and compensation driving signals based on the phase timing, enabling simple control through phase-based periodic operation without complicating the circuit arrangement
2Device complexity
If separate circuits are used for gate driving signal and compensation driving signal, then the circuit arrangement becomes simple, but the device complexity increases
Solution Approach 1:
The patent makes the gate driving circuit universal by enabling it to perform multiple functions: outputting gate driving signals during the display phase and compensation driving signals during the field blanking phase. This multi-functionality reduces the number of separate circuits needed, simplifying the overall circuit arrangement while maintaining manageable device complexity
Solution Approach 2:
The patent introduces dynamic phase control to the gate driving circuit, allowing it to adapt its output function based on the operating phase. The circuit dynamically switches between different signal output modes (gate driving vs. compensation driving) controlled by phase timing signals, enabling a single circuit to replace multiple static circuits and simplify the overall arrangement
3Measurement precision
If the shift register unit outputs different signals in different phases, then the signal timing precision improves, but the control complexity increases
Solution Approach 1:
The patent uses periodic action with clearly defined display phase and field blanking phase to achieve precise signal timing. The periodic alternation between phases provides natural timing references that ensure accurate output timing for different signal types, while the regular周期性 nature keeps control logic relatively simple through repetitive phase-based operation
Solution Approach 2:
The patent implements preliminary action by pre-defining the phase structure (display phase followed by field blanking phase) and using phase timing signals to预先 determine when each signal type should be output. This preliminary phase setup establishes precise timing boundaries before actual signal output, achieving timing precision without complex real-time control decisions
Data Source
AI summary
A shift register unit, a gate driving circuit, a display device, and a method for controlling a shift register unit are provided. The shift register unit includes a first input sub-circuit, a second input sub-circuit, a first isolation sub-circuit, and a first output sub-circuit. The first input sub-circuit is configured to control a potential of a first node. The second input sub-circuit is configured to control a potential of a second node. The first isolation sub-circuit is configured to control conduction and interruption of electrical coupling between the first node and the second node. The first output sub-circuit is configured to output a grate driving signal in a display phase and output a compensation driving signal in a field blanking phase.


