Shift Register Unit for OLED Gate Drive Circuit

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Solution Overview

Problem

Existing shift register units in gate driving circuits for OLED display panels face challenges in providing lossless and interference-free outputs, leading to abnormal output phenomena due to signal mutual influence.

Innovation Solution

A shift register unit with a circuit structure that includes a first input circuit, an output control circuit, and an output circuit, which controls the output through a second node to stabilize the levels of the first and second nodes, ensuring stable output of clock signals and avoiding abnormal outputs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional shift register unit structure is used, then the circuit complexity is reduced, but signal mutual influence causes abnormal output and loss of signal integrity

Engineering Contradiction:
Improvesignal integrityVSAvoidcircuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The shift register unit is segmented into functionally independent circuits: a first input circuit for clock signals, a second input circuit for control signals, an output control circuit, and an output circuit. This segmentation isolates signal paths to prevent mutual interference while maintaining overall circuit functionality.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The output control circuit acts as an intermediary between the input circuits and the output circuit. It controls the timing and sequence of signal transmission, ensuring that clock signals and control signals are processed in the correct order without interfering with each other, thereby preventing abnormal outputs.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If multiple output signals are provided simultaneously, then the productivity of the gate driving circuit is improved, but signal interference causes lossless output to fail

Engineering Contradiction:
Improveoutput capabilityVSAvoidoutput quality
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The output control circuit implements periodic action by sequentially enabling different output paths based on clock cycles. During different phases of the clock signal, different output circuits are activated in a controlled manner, allowing multiple signals to be output without simultaneous interference, thus achieving lossless multi-output.

Inventive Principle:
Principle #19Periodic action

3Reliability

If the node levels are not stabilized, then the circuit operation is simpler, but abnormal output phenomena occur due to signal mutual influence

Engineering Contradiction:
Improveoutput stabilityVSAvoidcontrol mechanism
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The output control circuit incorporates feedback mechanisms that monitor the levels of first and second nodes. Based on this feedback, the circuit dynamically adjusts its control signals to maintain stable node levels, preventing abnormal output phenomena caused by signal mutual influence while keeping the control mechanism manageable.

Inventive Principle:
Principle #23Feedback

Data Source

PatentEP3836133B1Shift register unit, gate drive circuit, display device, and driving method
Publication Date: 2025.01.22 BOE TECHNOLOGY GROUP CO LTD
  • EP3836133B1 patent drawingFigure 1~2
  • EP3836133B1 patent drawingFigure 3~4
  • EP3836133B1 patent drawingFigure 5~6

AI summary

A shift register unit, a gate driving circuit, a display device, and a driving method are provided. The shift register unit (10) includes a first input circuit (100), an output control circuit (200), and an output circuit (300). The first input circuit (100) is configured to output a first input signal to a first node (Q1) in response to a first control signal; the output control circuit (200) is configured to output an output control signal to a second node (Q2) under control of a level of the first node (Q1); and the output circuit (300) includes an output terminal (OUT), and the output circuit (300) is configured to output an output signal to the output terminal (OUT) under control of a level of the second node (Q2). The shift register unit can achieve multiple outputs, avoid output abnormality phenomenon caused by the mutual influence between output signals, and enhance the reliability of the circuit.