Shift Register Output Stage Driving Voltage Enhancement
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Solution Overview
Problem
Conventional shift registers used in flat panel displays face issues with reduced driving ability due to voltage level restrictions and floating node states, leading to potential operational failures.
Innovation Solution
A shift register design with a control module and driving module that dynamically adjusts voltage levels based on input signals and clock signals, preventing floating states and enhancing driving ability by managing voltage levels across multiple nodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the start signal ST and previous-stage output signal SN-1 are transmitted through turned-on N-type transistors to generate output signal SN, then the shift register can operate sequentially, but the voltage level of the output signal SN is restricted to VGH-Vth due to transistor threshold voltage drops
Solution Approach 1:
The patent applies dynamics by making the transistor operating states changeable rather than fixed. Specifically, transistors are dynamically switched between turned-on and turned-off states in different time periods to achieve different functions: in the first time period, transistors are turned on for signal transmission, and in the second time period, they are turned off to allow capacitor discharge and voltage restoration, thereby resolving the voltage level restriction issue while maintaining sequential operation
Solution Approach 2:
The patent implements periodic action by dividing operation into distinct time periods with different transistor states. The first time period involves turned-on transistors for signal propagation, while the second time period involves turned-off transistors for capacitor discharge and voltage level restoration. This periodic switching resolves the contradiction by allowing the system to achieve both sequential operation and adequate driving ability at different phases
2Device complexity
If the node A2 is left floating between time points t2-t3 and t4-t5 during operation, then the circuit structure is simplified, but the voltage level at node A2 drops due to leakage current causing operational failure
Solution Approach 1:
The patent applies preliminary action by proactively discharging the capacitor connected to node A2 before the floating state occurs, and restoring its voltage level in preparation for the next operation phase. This is achieved by turning off specific transistors at predetermined times to create discharge paths, preventing voltage drop due to leakage current while maintaining relatively simple circuit structure
Solution Approach 2:
The patent implements feedback mechanisms where the state of transistors is controlled based on the operational phase timing. The control logic monitors the operation timing and adjusts transistor states accordingly - turning off transistors to create discharge paths during floating periods, and turning them on again when needed for signal transmission, thereby maintaining operational stability without significantly increasing circuit complexity
Data Source
AI summary
A shift register and flat panel display using the same is provided therein. The shift register receives an operating voltage level. Through the circuit provided by the shift register, a driving voltage of an output-stage transistor is higher than prior art. Thus, the shift register has an enhanced driving ability.