Shift Register Wire Layout for Narrow-Bezel Display Substrates
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Solution Overview
Problem
Existing display substrates face challenges in optimizing the layout and connection of shift register units, leading to increased size and reduced flexibility in designing narrow frame displays.
Innovation Solution
The display substrate incorporates a shift register unit with an optimized layout, including a first connection wire with specific portions extending along different directions, and a manufacturing method that forms semiconductor layers and conductive layers in a specific sequence to reduce the size of the shift register unit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the shift register unit uses a conventional layout with standard connection wires, then the connection between gate electrodes and control circuits is achieved, but the overall size of the shift register unit increases, making it difficult to design narrow frame displays
Solution Approach 1:
The connection wire is designed with multi-directional extensions (first portion extending in first direction, second portion extending in second direction opposite to first direction), utilizing dimensional optimization to reduce the bounding box area of the shift register unit while maintaining all necessary electrical connections
Solution Approach 2:
The connection wire is segmented into multiple portions (first portion, second portion) that can be independently optimized in different directions, allowing the gate electrode connections to be made more compact without compromising manufacturing feasibility
2Area of stationary object
If the connection wire extends only in one direction, then the manufacturing process is simplified, but the space utilization is inefficient and the shift register unit size cannot be minimized for narrow frame designs
Solution Approach 1:
The connection wire adopts an asymmetric multi-directional configuration rather than a symmetric single-direction layout, allowing optimal space utilization by extending connections in directions that best fit the compact shift register unit geometry
Data Source
Figure 1A
Figure 1B~1C
Figure 1D~2
AI summary
A display substrate is provided. The display substrate includes a base substrate (10), and further includes a shift register unit (105), a first clock signal line (ECK), and a second clock signal line (ECB) in a peripheral region (106) of the base substrate (10); the first clock signal line (ECK) and the second clock signal line (ECB) extend along a first direction (Y) on the base substrate (10); a first portion (L11) and a second portion (L12) of a first connection wire (L1) of the display substrate are connected to and integrally formed with a first gate electrode (G21) of a first control transistor (T2) of a second node control circuit (1043) of the shift register unit (105); the first portion (L11) of the first connection wire (L1) extends along the first direction (Y), and an orthographic projection of the first portion (L11) of the first connection wire (L1) on the base substrate (10) is on a side of an orthographic projection of an active layer (A2) of the first control transistor (T2) on the base substrate (10) away from a display region (102); and the second portion (L12) of the first connection wire (L1) extends along a direction, opposite to an extending direction of the first portion (L11) of the first connection wire (L1), in the first direction (Y), and an orthographic projection of the second portion (L12) of the first connection wire (L1) on the base substrate (10) is on a side of the orthographic projection of the active layer (A2) of the first control transistor (T2) on the base substrate (10) close to the display region (102).