Shifted Chip Stacking Layout for Multi-Chip Semiconductor Packaging

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Solution Overview

Problem

Existing semiconductor devices face challenges in efficiently stacking and connecting multiple chips while allowing for the appropriate disposition of additional chips, particularly in configurations where terminals extend in the stacking direction.

Innovation Solution

The semiconductor device employs a shifted stacking arrangement of first semiconductor chips on a wiring substrate, utilizing metal bumps, vertical wires, spacers, and a molding resin layer to connect and secure multiple chips, with optional support bodies and spacers for structural support, enabling efficient electrical connections and chip alignment.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multiple chips are stacked in the stacking direction with terminals extending therefrom, then the number of integrated chips increases, but it becomes difficult to appropriately dispose additional chips

Engineering Contradiction:

Improvenumber of integrated chipsVSAvoidability to dispose additional chips

Core Design Contradiction:

Quantity of substanceVSAdaptability or versatility

Solution Approach 1:

The patent transitions from a single-column stacking architecture to a multi-column three-dimensional stacking architecture. Multiple stacking directions are established, allowing chips to be arranged in parallel columns rather than a single linear sequence. This dimensional expansion enables additional chips to be integrated by adding new stacking columns without interfering with existing chip connections and terminals.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The chip stacking structure is segmented into multiple independent stacking columns, where each column can be configured separately. This segmentation allows flexible disposition of additional chips by creating new stacking columns or extending existing ones, while maintaining the integrity of original chip connections. Each stacking column operates as an independent unit with its own set of terminals and interconnections.

Inventive Principle:

Principle #1Segmentation

2Quantity of substance

If chips are stacked with terminals extending in the stacking direction, then chip integration is achieved, but structural complexity increases

Engineering Contradiction:

Improvenumber of stacked chipsVSAvoidstructural complexity

Core Design Contradiction:

Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent employs universal stacking column structures that can be replicated and extended. Each stacking column follows a standardized configuration with consistent terminal arrangements and connection patterns. This universality allows the system to scale to multiple chips without proportionally increasing structural complexity, as new chips are integrated using the same modular column templates rather than requiring custom structural designs.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS12489086B2Semiconductor device

Publication Date: 2025.12.02 KIOXIA CORP

AI summary

A semiconductor device includes a wiring substrate inside which a wiring layer is provided, a plurality of first semiconductor chips stacked in a shifted manner on the wiring substrate and each provided with a connection terminal on a surface facing the wiring substrate, and a second semiconductor chip having a function different from functions of the first semiconductor chips and provided on the wiring substrate on a side where the connection terminals are electrically connected to the wiring substrate.