Short-Circuit Failure Location Using VC Anomaly and Conductive Plating
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Solution Overview
Problem
Existing methods for locating weak defects in short-circuit semiconductor structures are inefficient and inaccurate, affecting the success rate and efficiency of failure analysis.
Innovation Solution
A method involving optical beam induced resistance change to roughly locate anomalies, plating the failure region with a conductive material, and using focused ion beam sample preparation to accurately identify the failure point through voltage contrast on a cross-section.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional location methods (OBIRCH, SEM VC, TEM) are used sequentially, then the analysis process can be completed, but the success rate and efficiency of locating weak defects remain low
Solution Approach 1:
The patent applies preliminary action by performing OBIRCH rough location and conductive material plating before final defect observation. The method pre-prepares the sample by locating the anomaly region and enhancing conductivity, which improves subsequent defect detection accuracy and reduces overall analysis time
Solution Approach 2:
The failure analysis process is segmented into distinct stages: OBIRCH rough location, conductive material plating, FIB cross-section preparation, and final defect observation. This segmentation allows each stage to be optimized independently, improving overall efficiency while maintaining high detection accuracy
2Measurement precision
If the chip is ground to remove a layer for further location, then deeper defects can be observed, but the analysis time and process complexity increase
Solution Approach 1:
The conductive material plating is performed as a preliminary action before FIB cross-section preparation. This pre-enhancement of conductivity allows for more efficient subsequent observation and reduces the time needed for detailed defect analysis
Solution Approach 2:
The patent changes the electrical conductivity parameter of the failure region by plating conductive material. This parameter change enhances the visibility and detectability of defects in subsequent observations, allowing faster and more accurate defect location without extensive material removal
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enhances the success rate and efficiency of failure analysis by accurately locating short circuits through increased conductive material area and significant voltage contrast.
Implementation Method 1
a method involving optical beam induced resistance change to roughly locate anomalies
Implementation Method 2
plating the failure region with a conductive material layer to connect the second layer metal via to the conductive material layer
Implementation Method 3
performing focused ion beam sample preparation along the failure region to form a sample, and observing a VC on a cross-section of the sample
Data Source
AI summary
The present application provides a failure analysis and location method for a short circuit structure. a first layer metal wire structure and a second layer metal wire structure located above the first layer metal wire structure, the first and second layer metal wire structures are connected by a first layer metal via located between the first and second layer metal wire structures; a second layer metal via located above the second layer metal wire structure and connected to the second layer metal wire structure. A VC anomaly in the semiconductor structure is roughly located to find a failure region. The failure region is plated with a conductive material layer to connect the second layer metal via to the conductive material layer, wherein when an abnormal VC is found at a position on the cross-section of the sample, a failure point at the position is accurately located.