Shorting Bar Equipotential Coupling for ESD Protection in OLED Fabrication

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Solution Overview

Problem

The fabrication process of organic light emitting display devices is prone to defects due to electrostatic discharge during the formation of sheet wires and drive elements on the mother board, which increases the risk of damage to the panels.

Innovation Solution

A method is introduced where a shorting bar is formed to equipotentially couple all sheet wires during the LTPS process, minimizing electrostatic discharge by isolating the sheet wires using a Galvanic effect etching process, allowing for the automatic opening of the shorting bar without additional steps, thus preventing panel damage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If sheet wires are formed on the mother board to enable sheet unit testing, then testing efficiency is improved, but electrostatic discharge damage to panels increases

Engineering Contradiction:
Improvetesting efficiencyVSAvoidelectrostatic discharge damage
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

A ground wire is introduced as an intermediary element between the sheet wires and the panels. The ground wire serves as a mediator that provides a safe discharge path for electrostatic charges, preventing direct electrostatic discharge damage to the panels while maintaining the sheet wire connectivity for efficient testing.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The ground wire is formed beforehand during the fabrication process, before sheet testing is performed. This pre-established protective pathway cushions the panels against potential electrostatic discharge damage that could occur during subsequent testing operations, allowing efficient sheet unit testing without compromising panel safety.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

2Measurement precision

If panels are tested individually after separation, then testing accuracy is maintained, but overall testing time increases

Engineering Contradiction:
Improvetesting accuracyVSAvoidtesting time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

Multiple panels are merged into a sheet unit structure that allows simultaneous testing. The ground wire system enables multiple panels to be tested together as a group rather than individually, significantly reducing overall testing time while maintaining testing accuracy through the protected electrical connection pathway.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces the occurrence of electrostatic discharge, enabling efficient sheet testing and subsequent separation of panels without defects, thereby improving the overall fabrication efficiency and panel quality.

Implementation Method 1

electrostatic discharge (ESD) can be introduced externally. This electrostatic discharge may damage the panels during the fabrication

Methodology Applied
Scientific EffectElectrostatic discharge: Electrostatic Discharge

Implementation Method 2

materials constituting an anode layer of the organic light emitting diodes have lower reactivity than materials constituting the shorting bar, making it possible to etch the shorting bar using a Galvanic effect during a wet etch process for etching the anode layer

Methodology Applied
Scientific EffectGalvanic effect:

Data Source

PatentUS7915070B2Method for fabricating organic light emitting display device
Publication Date: 2011.03.29 SAMSUNG DISPLAY CO LTD
  • US7915070B2 patent drawing
  • US7915070B2 patent drawing
  • US7915070B2 patent drawing

AI summary

A fabricating method of an organic light emitting display device including performing a sheet test as a sheet unit on a mother board formed with panels and sheet wires for supplying test signals to the panels on the mother board, the method including: forming drive elements for driving the panels in each of the panels and forming sheet wires electrically coupled to at least a portion of the drive elements and shorting bar electrically coupling all of the sheet wires; forming organic light emitting diodes in each of the panels and isolating the sheet wires from each other by etching open regions of the shorting bar apart from contact regions of the shorting bar for coupling the shorting bar to the sheet wires; performing the sheet test on the plurality of panels by supplying the test signals to the sheet wires; and separating the panels by scribing the mother board.