Shuffle Exchange Network for Low-Latency Full Permutations
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Solution Overview
Problem
Existing sorting techniques in computing devices, such as neural network processing, become a performance bottleneck for permutation operations, leading to processing speed limitations and increased area requirements in permutation networks.
Innovation Solution
A shuffle exchange network is implemented with a first series of inverse shuffle operations followed by a second series of shuffle operations, specifically designed for sequence lengths that are powers of two, reducing latency to O((log N)^2 and switch count to O(N) compared to traditional Benes networks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If traditional Benes networks are used for permutation operations, then sorting and permutation functions can be achieved, but latency increases to O(N log N) and area requirements increase
Solution Approach 1:
The patent divides the permutation network into two distinct stages: a first stage performing inverse shuffle operations and a second stage performing shuffle operations. This segmentation allows each stage to handle specific permutation tasks efficiently, reducing the overall complexity compared to a single-stage Benes network while achieving the same permutation functionality.
Solution Approach 2:
The patent employs inverse shuffle operations in the first stage before the standard shuffle operations in the second stage. This inversion approach allows the network to achieve full permutation capability with reduced latency by reversing the traditional Benes network sequence, transforming the complexity from O(N log N) to O((log N)^2).
2Productivity
If existing sorting techniques are used for neural network processing, then object detection and ranking can be performed, but processing speed becomes a performance bottleneck
Solution Approach 1:
The patent ensures continuous useful action by implementing overlapping shuffle and inverse shuffle operations across multiple stages. The first stage performs inverse shuffles while the second stage performs shuffles, creating a continuous permutation process that eliminates idle time and optimizes processing speed for neural network tasks like object detection and ranking.
Solution Approach 2:
The patent changes the operational parameters of the network by using a two-stage architecture with specific shuffle and inverse shuffle sequences. This parameter change transforms the time complexity from O(N log N) to O((log N)^2), significantly reducing the time required for sorting operations in neural network processing.
Data Source
AI summary
A shuffle exchange network includes a first circuit that includes a first stage having a first set of elements storing a first set of sequences of length N, and multiple exchange units each receiving input from a first pair of the elements. Each exchange unit selectively couples the first pair of elements in the first stage to a second pair of elements that is fed back to the first stage. The exchange units receive input from each pair of elements based on a perfect shuffle operation. A second circuit outputs to the first circuit and includes a second stage preceding the first stage. The second circuit operates based on an inverse perfect shuffle operation.