Image Sensor Shutter Transistor Leakage Current Reduction
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Solution Overview
Problem
Image sensors with global electronic shutters face issues due to leakage current in shutter transistors, leading to dark current and distortion in captured images, especially when storing charge for extended frame times.
Innovation Solution
The use of P-type shutter transistors in N-wells and N-type transistors in P-wells, coupled to a power supply, reduces leakage current by maintaining a voltage level close to the power supply during dark exposure, significantly differentiating voltage levels for dark and light exposures, and employing correlated double sampling to mitigate noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If shutter transistors are used to transfer charge onto image-storage capacitors in a global electronic shutter, then high-speed photography capability is achieved, but leakage current causes dark current and image distortion
Solution Approach 1:
The patent changes the electrical parameters of the shutter transistor by forming it in a well structure with reversed polarity (P-type in N-well or N-type in P-well) and coupling the well to a power supply voltage. This parameter change reduces the leakage current by maintaining a voltage level close to the power supply during dark exposure, thereby reducing dark current while preserving the high-speed shutter functionality
2Productivity
If charge is stored on image-storage capacitors for extended frame times, then high-speed burst photography is enabled, but leakage current increases causing voltage shifts and image quality degradation
Solution Approach 1:
The patent modifies the electrical parameters of the shutter transistor by implementing a well structure with power supply coupling. This changes the voltage characteristics during charge storage, maintaining a voltage level close to the power supply that significantly reduces leakage current over extended frame times, enabling high-speed burst photography while maintaining image quality
3Object-generated harmful factors
If P-type transistors are used in N-wells with power supply coupling, then leakage current is reduced, but device complexity increases
Solution Approach 1:
The patent applies parameter changes by utilizing standard CMOS well structures with power supply coupling, which is a conventional fabrication technique. This approach reduces leakage current without significantly increasing device complexity, as the well structure and power supply connection are standard elements in CMOS image sensor design
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration minimizes dark current and distortion, ensuring accurate image capture with reduced noise and improved image quality by maintaining voltage levels and using correlated double sampling to handle noise effectively.
Implementation Method 1
The shutter transistors are P-type transistors in N− wells held at an analog power voltage to reduce sensitivity of pixels to dark current
Implementation Method 2
A prior art pixel 100 (FIG. 1) for an image sensor has a photodiode 102 coupled through a first selection transistor 104
Data Source
AI summary
An image sensor has an array of pixels, each pixel having an associated shutter transistor coupled to transfer a charge dependent on light exposure of the pixel onto an image storage capacitor, the image-storage capacitors being configured to be read into an analog to digital converter. The shutter transistors are P-type transistors in N-wells, the wells held at an analog power voltage to reduce sensitivity of pixels to dark current; in an alternative embodiment the shutter transistors are N-type transistors in P-wells, the wells held at an analog ground voltage.