Si BJT Base Protection Using Oxide and SiGe Stack
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Solution Overview
Problem
Conventional methods for manufacturing Silicon Bipolar Junction Transistors (BJTs) are complex and not compatible with the production of other devices on the same wafer, particularly due to the need for protective layers that complicate processing steps and can lead to non-uniformities and over-etching issues.
Innovation Solution
A method involving the deposition of a protective TEOS oxide layer over the epitaxial silicon, followed by a dielectric layer and a SiGe layer stack, with a polysilicon layer providing electrical contact to the base region, and subsequent thermal treatment to fill voids created by etching, resulting in improved emitter base interfaces and reduced complexity in processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a protective layer is used to protect the base region during processing, then the emitter base interface quality is improved, but the process complexity increases and compatibility with other devices on the same wafer is reduced
Solution Approach 1:
A dielectric layer is introduced as an intermediary between the protective oxide layer and the emitter window. This dielectric layer serves as a placeholder that maintains the protective oxide in place during processing, allowing the oxide to continue protecting the base region without requiring direct exposure or removal steps that would compromise interface quality or increase complexity
Solution Approach 2:
The protective oxide layer is formed preliminarily before emitter window opening, and the dielectric layer is deposited over it before any etching occurs. This preliminary arrangement ensures the base region is protected from the outset and eliminates the need for later protective measures or complex sequence adjustments
2Ease of manufacture
If the protective layer is removed prior to growing the emitter layer, then the base region is exposed for emitter formation, but over-etching occurs and non-uniformities are introduced
Solution Approach 1:
The dielectric layer acts as a mediator that replaces the protective oxide in the emitter window area while leaving the oxide intact in other regions. This allows emitter formation to proceed with the oxide still providing protection where needed, preventing over-etching and non-uniformities while maintaining ease of manufacture
Solution Approach 2:
The dielectric layer is selectively positioned in the emitter window region, creating local differentiation. In this local area, the dielectric enables emitter formation without the oxide, while elsewhere the oxide remains to protect the base region, thus achieving both accessibility and uniformity in different locations
3Device complexity
If conventional processing steps are used without a protective layer, then the process flow is simpler, but the emitter base interface quality deteriorates
Solution Approach 1:
The protective oxide layer and the dielectric layer are combined in a stacked configuration. The oxide layer provides base region protection while the dielectric layer provides structural support and defines the emitter window, merging the functions of protection and patterning into a unified structure that maintains simplicity while improving interface quality
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances device performance parameters by protecting the epitaxial silicon during processing, reducing voids, and preventing over-etching, thus improving the compatibility and efficiency of BJT fabrication with other devices on the same wafer.
Implementation Method 1
The protective oxide may result in an improved emitter base interface, thereby resulting in improvements in one or more device performance parameters
Implementation Method 2
silicon from the polysilicon layer has migrated to at least partially fill voids thereat
Implementation Method 3
Since dopant atoms or ions typically migrate at a different rate from silicon atoms and ions a doping non-uniformity may generally result
Implementation Method 4
an n-type collector region grown epitaxially on a silicon substrate
Data Source
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AI summary
A method of manufacturing a Si BJT device is disclosed comprising prior processing steps; formation of a protective oxide layer over an active area of the Si BJT device; deposition of a dielectric layer, and a layer stack comprising SiGe, on the protective oxide; etching the dielectric layer, and the layer stack comprising SiGe, thereby removing them from the active area of the Si BJT; deposition of a polysilicon layer, and a further dielectric layer, across the device; etching the polysilicon base, and the further dielectric layer thereby removing it from the active area; implanting, through the protective oxide layer, a p-type dopant into the active area; etching the protective oxide layer, thereby removing it, and leaving voids under the dielectric layer; thermally treating the Si BJT device, thereby filling in voids under the polysilicon base; and subsequent processing steps. Corresponding devices are also disclosed.