SiC-AlN-GaN Semiconductor Laminate With Annealed Strain Buffer
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Solution Overview
Problem
Existing semiconductor laminates for high electron mobility transistors (HEMTs) face challenges in achieving high-quality semiconductor laminates and elements due to high dislocation densities in AlN and GaN layers, leading to poor crystallinity and increased strain.
Innovation Solution
A semiconductor laminate is fabricated using a substrate with a silicon carbide (SiC) main surface, where an aluminum nitride (AlN) layer is grown, subjected to annealing to reduce dislocation density, and then layered with an aluminum gallium nitride (AlGaN) intermediate layer and a gallium nitride (GaN) electron transport layer, all of which are grown in a nearly strain-free state.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If AlN and GaN layers are grown conventionally on SiC substrate, then the semiconductor laminate can be formed, but high dislocation densities result in poor crystallinity and increased strain
Solution Approach 1:
The patent applies preliminary action by performing annealing treatment on the AlN layer before growing the GaN layer. This pre-treatment reduces dislocation density in the AlN layer from conventional high levels to below 1×10^10 cm^-2, creating a high-quality foundation that prevents dislocation propagation to subsequent layers, thereby improving overall crystallinity quality
Solution Approach 2:
The patent utilizes parameter changes by controlling the lattice constant of the AlN layer through annealing treatment to achieve tensile strain at 27°C. This parameter adjustment optimizes the lattice matching between AlN and GaN layers, reducing strain accumulation and dislocation formation during GaN growth, thus enhancing crystallinity quality
2Ease of manufacture
If AlN layer is grown on SiC substrate without annealing, then the production process is simpler, but dislocation density remains high causing poor crystallinity
Solution Approach 1:
The patent applies parameter changes by implementing annealing treatment that modifies the physical and chemical parameters of the AlN layer, including temperature, atmosphere, and time control. These parameter adjustments reduce dislocation density below 1×10^10 cm^-2 and induce tensile strain at 27°C, significantly improving crystallinity quality while maintaining reasonable production complexity
3Device complexity
If multiple layers are grown without strain control, then the device structure can be formed, but accumulated strain reduces device reliability
Solution Approach 1:
The patent applies parameter changes by controlling the lattice constant of the AlN layer through annealing to achieve tensile strain at 27°C. This strain state compensates for compressive strain that would otherwise accumulate in the GaN layer, enabling the formation of complex multi-layer structures while maintaining low overall strain and high device reliability
Solution Approach 2:
The patent uses the AlN layer as an intermediary that mediates strain between the SiC substrate and the GaN layer. By inducing tensile strain in the AlN layer through annealing, it acts as a strain buffer that prevents excessive compressive strain accumulation in the GaN layer, thereby improving device reliability in complex multi-layer structures
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration results in a semiconductor laminate with low dislocation densities and improved crystallinity, enhancing the reliability and performance of the semiconductor elements, particularly HEMTs.
Implementation Method 1
subjecting the first layer to an annealing treatment... the dislocation density in the main surface of the first layer is decreased through the annealing treatment
Data Source
AI summary
To obtain a high-quality semiconductor laminate and a high-quality semiconductor element. [Solution] Provided is a semiconductor laminate including a substrate that includes silicon carbide and has a main surface, a first layer that is provided on the main surface of the substrate and includes an aluminum nitride crystal, a second layer that is provided on the first layer and includes a crystal of any of aluminum gallium nitride, aluminum indium nitride, and aluminum indium gallium nitride, and a third layer that is provided on the second layer and includes a gallium nitride crystal, in which the first layer has tensile strain in a direction along the main surface at 27° C.