SiC MOS Gate Back-Surface Roughness for Accurate ON Voltage Screening
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Solution Overview
Problem
Conventional silicon carbide semiconductor devices suffer from measurement variability and inaccurate detection of stacking faults due to high chip back-surface roughness, leading to increased ON resistance and potential device failure.
Innovation Solution
The silicon carbide semiconductor device and its manufacturing method involve specifying the roughness of the back surface to be within certain limits, reducing contact resistance variability, and enhancing the accuracy of ON voltage measurement by controlling the chip back-surface roughness to less than 4 μm within 30 μm and less than 2 μm beyond 30 μm, and using a gold plating on the cemented carbide stage for improved contact.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional silicon carbide semiconductor devices are manufactured without controlling back-surface roughness, then manufacturing process is simpler, but measurement precision of ON voltage deteriorates due to high contact resistance variability
Solution Approach 1:
The patent applies parameter changes by specifying quantitative limits for back-surface roughness (Rp ≤ 4 μm within 30 μm from cross section, Rp ≤ 2 μm beyond 30 μm). This transforms the manufacturing process by establishing precise numerical parameters for surface roughness control, thereby improving ON voltage measurement precision while maintaining manufacturing feasibility through defined tolerances.
2Reliability
If gold plating is applied on the cemented carbide stage, then contact resistance variability is reduced, but manufacturing cost and process complexity increase
Solution Approach 1:
The patent introduces gold plating on the cemented carbide stage as an intermediary layer between the measurement probe and the silicon carbide semiconductor device. This intermediary reduces contact resistance variability by providing a stable, conductive interface, thereby improving measurement reliability. The added layer serves as a mediator that facilitates better electrical contact without requiring fundamental changes to the measurement system.
3Reliability
If back-surface roughness is not controlled, then manufacturing is easier, but stacking fault detection accuracy deteriorates leading to device failure
Solution Approach 1:
The patent applies preliminary action by controlling the back-surface roughness during the manufacturing process before device operation. By establishing precise surface finish requirements (Rp ≤ 4 μm within 30 μm, Rp ≤ 2 μm beyond 30 μm) during fabrication, the patent prevents stacking fault expansion and ensures accurate stacking fault detection, thereby improving device reliability proactively rather than reactively.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces measurement error and enhances the accuracy of ON voltage detection, allowing precise identification of devices prone to stacking fault expansion, thereby preventing device failure.
Implementation Method 1
using a gold plating on the cemented carbide stage for improved contact
Data Source
AI summary
Back-surface roughness of a back surface of a silicon carbide semiconductor device having a MOS gate structure in a first region that is a region within 30 μm of a cross section (lateral surface) of the device is at most 4 μm while the back-surface roughness in a second region other than the first region is at most 2 μm, the back surface of the silicon carbide semiconductor device is the back surface of the second electrode. In a method of manufacture, the back-surface roughness of the device is specified to meet a predetermined condition. Then, ON voltages of the device before and after a forward current is passed through body diodes of the device are measured, and a rate of change of the ON voltage while the forward current is passed through body diodes is calculated, and then the device having a calculated rate of change less than 3% is identified.