SiC BJT Mesa Buffer Layer for Field Crowding Reduction
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Solution Overview
Problem
High voltage silicon carbide (SiC) power devices face issues with electric field crowding at mesa corners, leading to reduced breakdown voltage, and current gain degradation in bipolar junction transistors (BJTs) due to material defects and surface recombination, which affects their performance and reliability.
Innovation Solution
The design incorporates a lightly doped buffer layer with a mesa step adjacent to the emitter mesa, a local emitter contact region, and a conduction layer on the sidewall, which reduces current crowding and surface recombination by altering the current conduction path and providing increased resistance, thereby improving breakdown voltage and current gain stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a mesa termination is used in high voltage SiC devices, then the device structure is simplified and manufacturing is easier, but electric field crowding occurs at the mesa corner leading to reduced breakdown voltage
Solution Approach 1:
The patent applies local quality by creating a junction termination extension (JTE) region with specific doping characteristics localized at the mesa corner. This JTE region has a doping concentration that varies spatially, being higher near the junction and lower further away, which locally modifies the electric field distribution to prevent field crowding at the critical mesa corner region while maintaining the overall mesa structure
Solution Approach 2:
The patent introduces an intermediary JTE region that acts as a mediator between the heavily doped p-type mesa region and the lightly doped n-type drift region. This intermediate region with its graded doping profile serves as a transition zone that smoothly distributes the electric field, preventing the direct interaction between the high field at the junction and the surface effects at the mesa corner
2Manufacturing precision
If over-etching is performed during mesa fabrication, then manufacturing tolerance is relaxed, but electric field crowding at the mesa corner is exacerbated leading to lower breakdown voltage
Solution Approach 1:
The patent applies beforehand cushioning by designing the JTE region with a doping profile that anticipates and compensates for potential over-etching variations. The graded doping structure provides a buffer zone that maintains electric field control even when the mesa depth varies within manufacturing tolerances, cushioning against the adverse effects of over-etching on breakdown voltage
3Device complexity
If conventional mesa termination with JTE is used, then manufacturing process is simpler, but surface effects cause uneven depletion region spread reducing breakdown voltage
Solution Approach 1:
The patent applies parameter changes by modifying the doping concentration parameter in the JTE region. The doping concentration is designed to vary continuously from the junction outward, creating a graded profile that changes the electrical parameters of the termination region. This parameter variation controls the depletion region spread more uniformly across the surface, preventing the uneven distribution that occurs with conventional uniform doping
Data Source
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AI summary
A bipolar junction transistor includes a collector having a first conductivity type, a drift layer having the first conductivity type on the collector, a base layer on the drift layer and having a second conductivity type opposite the first conductivity type, a lightly doped buffer layer having the first conductivity type on the base layer and forming a p-n junction with the base layer, and an emitter mesa having the first conductivity type on the buffer layer and having a sidewall. The buffer layer includes a mesa step adjacent to and spaced laterally apart from the sidewall of the emitter mesa, and a first thickness of the buffer layer beneath the emitter mesa is greater than a second thickness of the buffer layer outside the mesa step.