SiC BJT Recess Region for Avalanche Robustness
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Solution Overview
Problem
Bipolar junction transistors (BJTs), particularly silicon carbide (SiC) BJTs, face high surface electric fields and localized avalanche regions leading to extremely high localized current densities, which can result in device failure during avalanche events.
Innovation Solution
A bipolar junction transistor design that includes a recess region embedded in the collector layer, forming a first P-N junction and separating the avalanche point from the second P-N junction, reducing the likelihood of avalanche-induced failures and output capacitance, thereby enhancing robust avalanche behavior and minimizing switching losses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional BJT structure is used, then the device can operate in avalanche mode, but high surface electric fields and localized avalanche regions cause extremely high localized current densities leading to device failure
Solution Approach 1:
The patent introduces a recess region with different doping concentration and geometry at a specific location in the collector layer. This creates localized variations in electric field distribution, concentrating the avalanche effect in the recess region rather than allowing it to occur uniformly across the high-field surface regions. The recess region has lower doping concentration compared to the surrounding collector layer, which modifies the local electric field characteristics and redirects avalanche breakdown to this controlled location.
Solution Approach 2:
The recess region acts as an intermediary structure between the high-field surface regions and the bulk collector. It serves as a controlled avalanche initiation point that mediates the energy dissipation process, preventing direct avalanche occurrence at the vulnerable surface regions. The recess region absorbs the avalanche stress through its specific geometric and doping characteristics, protecting the main device structure from damage.
2Loss of energy
If the recess region is embedded in the collector layer, then output capacitance is reduced and switching losses decrease, but the device structure becomes more complex
Solution Approach 1:
The patent introduces a vertical dimension to the collector layer by creating a recess region that extends downward from the surface. This dimensional change allows the avalanche effect to be redirected into the bulk of the device rather than being confined to the surface plane. The recess region's depth and lateral dimensions are optimized to achieve proper electric field distribution and capacitance reduction while maintaining manufacturability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design allows for robust avalanche operation, reducing the risk of device failure and minimizing switching losses by directing avalanche events to a specific P-N junction and reducing output capacitance when the recess region is electrically coupled to the emitter.
Implementation Method 1
Avalanche in a BJT occurs when carriers in the transition region are accelerated by electric fields in the transition region to energies sufficient to free electron-hole pairs via collisions with bound electrons, thereby increasing the current through the transition region
Implementation Method 2
carriers in the transition region are accelerated by electric fields in the transition region to energies sufficient to free electron-hole pairs
Data Source
AI summary
A bipolar junction transistor (BJT), which includes a collector layer, a base layer on the collector layer, an emitter layer on the base layer, and a recess region embedded in the collector layer, is disclosed. A base-collector plane is between the base layer and the collector layer. The recess region is may be below the base-collector plane. Further, the recess region and the base layer are a first type of semiconductor material. By embedding the recess region in the collector layer, the recess region and the collector layer form a first P-N junction, which may provide a point of avalanche for the BJT. Further, the collector layer and the base layer form a second P-N junction. By separating the point of avalanche from the second P-N junction, the BJT may avalanche robustly, thereby reducing the likelihood of avalanche induced failures, particularly in silicon carbide (SiC) BJTs.